???<!-- GIF89;a -->
123123123123
.....................................................................................................................................???<!-- GIF89;a -->
123123123123
.....................................................................................................................................ELF           (      4           4                                                   p  p                    8  8                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        8 k   (            2 j                                 qcom,glymur          qcom,glymur                             board-id              ,default_process-glymur-1.0-adsp          6            soc                                   @      ipcc                                   
   qcom,ipcc      ipcc@3e02000             qcom,ipcc-protocol           H              L            SMPROC            a             n               y                  D                      !   "   :   ;   <   -   .   7   8                  @         ipcc@3e40000             qcom,ipcc-protocol           H              L            SCOMPUTE_L0           a            n               N                   0               	   !   "   
            -   .         @         ipcc@3e80000             qcom,ipcc-protocol           H              L            SCOMPUTE_L1           a            n                                  0               	   !   "   
            -   .         @         ipcc@3ec0000             qcom,ipcc-protocol           H              L            SPERIPH           a            n                                  D                  !   "                  ,   -   .   7   8            @            ipcc_legacy@6888004          H              @      ipcc_legacy_sdc          qcom,ipcc-legacy                        L            n              8  9  :  ;                     @          timetick                                 timer@68a2000            qcom,timetick            H           SystemTimer          $                                  @         timer@68a3000            qcom,timetick            H0          WakeUpTimer          $                                  @            pinctrl@f100000       !   qcom,glymur-pinctrl qcom,pinctrl             H                                                                                            n               >   O   V      B   u           $   }                         P  4summary directconn0 directconn1 directconn2 directconn3 directconn4 directconn5         D           WGPIOINTADSP          @      qup0_se0_l0         h                @         qup0_se0_l1         h               @         qup0_se0_l2         h               @         qup0_se0_l3         h               @         qup0_se1_l0         h               @         qup0_se1_l1         h               @         qup0_se1_l2         h               @         qup0_se1_l3         h               @         qup0_se2_l0         h               @         qup0_se2_l1         h   	            @         qup0_se2_l2         h   
            @         qup0_se2_l3         h               @         qup0_se2_l4         h               @         qup0_se2_l5         h               @         qup0_se2_l6         h               @         qup0_se3_l0         h               @         qup0_se3_l1         h               @         qup0_se3_l2         h               @         qup0_se3_l3         h               @         qup0_se3_l4         h               @         qup0_se3_l5         h               @         qup0_se3_l6         h               @         qup0_se4_l0         h               @         qup0_se4_l1         h               @         qup0_se4_l2         h               @         qup0_se4_l3         h               @         qup0_se5_l0         h               @         qup0_se5_l1         h               @         qup0_se5_l2         h               @         qup0_se5_l3         h               @         qup0_se6_l0         h               @         qup0_se6_l1         h               @         qup0_se6_l2         h               @         qup0_se6_l3         h               @         qup0_se7_l0         h               @         qup0_se7_l1         h               @         qup0_se7_l2         h               @         qup0_se7_l3         h               @         qup1_se0_l0         h                @         qup1_se0_l1         h   !            @         qup1_se0_l2         h   "            @         qup1_se0_l3         h   #            @         qup1_se1_l0         h   $            @         qup1_se1_l1         h   %            @         qup1_se1_l2         h   &            @         qup1_se1_l3         h   '            @         qup1_se2_l0         h   (            @         qup1_se2_l1         h   )            @         qup1_se2_l2         h   *            @         qup1_se2_l3         h   +            @         qup1_se2_l4         h   1            @         qup1_se2_l5         h   2            @         qup1_se2_l6         h   3            @         qup1_se3_l0         h   ,            @         qup1_se3_l1         h   -            @         qup1_se3_l2         h   .            @         qup1_se3_l3         h   /            @         qup1_se3_l4         h   !            @         qup1_se3_l5         h   "            @         qup1_se3_l6         h   #            @         qup1_se4_l0         h   0            @         qup1_se4_l1         h   1            @         qup1_se4_l2         h   2            @         qup1_se4_l3         h   3            @         qup1_se5_l0         h   4            @         qup1_se5_l1         h   5            @         qup1_se5_l2         h   6            @         qup1_se5_l3         h   7            @         qup1_se6_l0         h   8            @         qup1_se6_l1         h   9            @         qup1_se6_l2         h   :            @         qup1_se6_l3         h   ;            @         qup1_se7_l0         h   6            @         qup1_se7_l1         h   7            @         qup1_se7_l2         h   4            @         qup1_se7_l3         h   5            @         qup2_se0_l0         h   @            @         qup2_se0_l1         h   A            @         qup2_se0_l2         h   B            @         qup2_se0_l3         h   C            @         qup2_se1_l0         h   D            @         qup2_se1_l1         h   E            @         qup2_se1_l2         h   F            @         qup2_se1_l3         h   G            @         qup2_se2_l0         h   H            @         qup2_se2_l1         h   I            @         qup2_se2_l2         h   J            @         qup2_se2_l3         h   K            @         qup2_se2_l4         h   Q            @         qup2_se2_l5         h   R            @         qup2_se2_l6         h   S            @         qup2_se3_l0         h   L            @         qup2_se3_l1         h   M            @         qup2_se3_l2         h   N            @         qup2_se3_l3         h   O            @         qup2_se3_l4         h   A            @         qup2_se3_l5         h   B            @         qup2_se3_l6         h   C            @         qup2_se4_l0         h   P            @         qup2_se4_l1         h   Q            @         qup2_se4_l2         h   R            @         qup2_se4_l3         h   S            @         qup2_se5_l0         h   T            @         qup2_se5_l1         h   U            @         qup2_se5_l2         h   V            @         qup2_se5_l3         h   W            @         qup2_se6_l0         h   X            @         qup2_se6_l1         h   Y            @         qup2_se6_l2         h   Z            @        qup2_se6_l3         h   [            @        qup2_se7_l0         h   P            @        qup2_se7_l1         h   Q            @        qup2_se7_l2         h   R            @        qup2_se7_l3         h   S            @        qup3_se0_l0         h               @        qup3_se0_l1         h               @        qup3_se0_l2         h               @  	      qup3_se0_l3         h               @  
      qup3_se0_l4         h               @        qup3_se0_l5         h               @        qup3_se0_l6         h               @        qup3_se0_l7         h               @         qup3_se1_l0         h   (            @        qup3_se1_l1         h   )            @        qup3_se1_l2         h   *            @        qup3_se1_l3         h   +            @        qup3_se1_l4         h   1            @        qup3_se1_l5         h   2            @        qup3_se1_l6         h   3            @        qup3_se1_l7         h   0            @        GPIO_config_active          l               @         GPIO_config_idle            l               @         GPIO_config_sleep           l             @         GPIO_config_wake            l      
         @            pinctrl@7760000       !   qcom,glymur-pinctrl qcom,pinctrl             Hv                                                  s                          l     E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E         @     slimbus_clk         h               @         slimbus_data            h               @         slimbus_default_gpio_cfg            l     !    !         @            pinctrl@75C0000       !   qcom,glymur-pinctrl qcom,pinctrl             H\                 -                                                                a  a   E   E  Q  Q   E   E  a  a   E   E   E   E  I  E  Q  Q   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E  Q  Q   E   E   E   E   E         @     ssc_gpio_10_clk         h   
            @        ssc_gpio_11_clk         h               @        ssc_gpio_12_clk         h               @        ssc_gpio_13_clk         h               @        ssc_gpio_18_clk         h               @        ssc_gpio_19_clk         h               @        ssc_gpio_24_clk         h               @        ssc_gpio_25_clk         h               @        ssc_gpio_26_clk_reserved            h               @         ssc_gpio_27_clk_reserved            h               @  !      ssc_gpio_28_clk_reserved            h               @  "      ssc_gpio_29_clk_reserved            h               @  #      ssc_gpio_30_clk_reserved            h               @  $      ssc_gpio_31_clk_reserved            h               @  %      ssc_gpio_34_clk_reserved            h   "            @  &      ssc_gpio_35_clk_reserved            h   #            @  '      ssc_gpio_6_clk          h               @  (      ssc_gpio_7_clk          h               @  )      ssc_qupv3_se0_0         h                @         ssc_qupv3_se0_1         h               @         ssc_qupv3_se10_0            h               @   !      ssc_qupv3_se10_1            h               @   "      ssc_qupv3_se10_2            h               @   #      ssc_qupv3_se10_3            h               @   $      ssc_qupv3_se11_0_reserved           h               @  *      ssc_qupv3_se11_1_reserved           h               @  +      ssc_qupv3_se11_2_reserved           h               @  ,      ssc_qupv3_se11_3_reserved           h               @  -      ssc_qupv3_se12_0_reserved           h               @  .      ssc_qupv3_se12_1_reserved           h               @  /      ssc_qupv3_se13_0_reserved           h                @  0      ssc_qupv3_se13_1_reserved           h   !            @  1      ssc_qupv3_se13_2_reserved           h   "            @  2      ssc_qupv3_se13_3_reserved           h   #            @  3      ssc_qupv3_se14_0_reserved           h   $            @  4      ssc_qupv3_se14_1_reserved           h   %            @  5      ssc_qupv3_se1_0         h               @         ssc_qupv3_se1_1         h               @         ssc_qupv3_se1_2_reserved            h               @  6      ssc_qupv3_se1_3_reserved            h               @  7      ssc_qupv3_se2_0         h               @   	      ssc_qupv3_se2_1         h               @   
      ssc_qupv3_se2_2         h               @         ssc_qupv3_se2_3         h               @         ssc_qupv3_se2_4         h               @  8      ssc_qupv3_se2_5         h   	            @  9      ssc_qupv3_se3_0         h               @         ssc_qupv3_se3_1         h   	            @         ssc_qupv3_se4_0         h   
            @         ssc_qupv3_se4_1         h               @         ssc_qupv3_se4_2         h               @         ssc_qupv3_se4_3         h               @         ssc_qupv3_se4_4         h               @  :      ssc_qupv3_se4_5         h               @  ;      ssc_qupv3_se5_0         h               @         ssc_qupv3_se5_1         h               @         ssc_qupv3_se5_2         h               @         ssc_qupv3_se5_3         h               @         ssc_qupv3_se6_0         h               @         ssc_qupv3_se6_1         h               @         ssc_qupv3_se6_2         h               @         ssc_qupv3_se6_3         h               @         ssc_qupv3_se7_0         h               @         ssc_qupv3_se7_1         h               @         ssc_qupv3_se7_2         h               @         ssc_qupv3_se7_3         h               @         ssc_qupv3_se8_0         h               @         ssc_qupv3_se8_1         h               @          ssc_qupv3_se9_0_reserved            h               @  <      ssc_qupv3_se9_1_reserved            h               @  =      qup_ssc0_se0_i2c_active         l                 @   >      qup_ssc0_se0_i2c_sleep          l                 @   ?      qup_ssc0_se0_i3c_active         l     
     
         @   @      qup_ssc0_se0_i3c_sleep          l     !     !         @   A      qup_ssc0_se0_i3c_ibi_active         l     
     
         @   B      qup_ssc0_se0_i3c_ibi_sleep          l     !     !         @   C      qup_ssc0_se1_i2c_active         l                 @   D      qup_ssc0_se1_i2c_sleep          l                 @   E      qup_ssc0_se1_i3c_active         l     
     
         @   F      qup_ssc0_se1_i3c_sleep          l     !     !         @   G      qup_ssc0_se1_i3c_ibi_active         l     
     
         @   H      qup_ssc0_se1_i3c_ibi_sleep          l     !     !         @   I      qup_ssc0_se2_i2c_active         l   	    
          @   J      qup_ssc0_se2_i2c_sleep          l   	    
          @   K      qup_ssc0_se2_i3c_active         l   	  
   
  
         @   L      qup_ssc0_se2_i3c_sleep          l   	  !   
  !         @   M      qup_ssc0_se2_i3c_ibi_active         l   	  
   
  
         @   N      qup_ssc0_se2_i3c_ibi_sleep          l   	  !   
  !         @   O      qup_ssc0_se2_spi_active          l   	X    
X    X    X          @   P      qup_ssc0_se2_spi_sleep           l   	  !   
  !     !     !         @   Q      qup_ssc0_se2_uart_active             l   	     
                     @   R      qup_ssc0_se2_uart_sleep          l   	     
                     @   S      qup_ssc0_se3_i2c_active         l                 @   T      qup_ssc0_se3_i2c_sleep          l                 @   U      qup_ssc0_se3_i3c_active         l     
     
         @   V      qup_ssc0_se3_i3c_sleep          l     !     !         @   W      qup_ssc0_se3_i3c_ibi_active         l     
     
         @   X      qup_ssc0_se3_i3c_ibi_sleep          l     !     !         @   Y      qup_ssc0_se4_i2c_active         l                 @   Z      qup_ssc0_se4_i2c_sleep          l                 @   [      qup_ssc0_se4_spi_active          l   X    X    X    X          @   \      qup_ssc0_se4_spi_sleep           l     !     !     !     !         @   ]      qup_ssc0_se4_uart_active             l                             @   ^      qup_ssc0_se4_uart_sleep          l                             @   _      qup_ssc0_se5_i2c_active         l                 @   `      qup_ssc0_se5_i2c_sleep          l                 @   a      qup_ssc0_se5_i3c_active         l     
     
         @   b      qup_ssc0_se5_i3c_sleep          l     !     !         @   c      qup_ssc0_se5_i3c_ibi_active         l     
     
         @   d      qup_ssc0_se5_i3c_ibi_sleep          l     !     !         @   e      qup_ssc0_se5_spi_active          l   X    X    X    X          @   f      qup_ssc0_se5_spi_sleep           l     !     !     !     !         @   g      qup_ssc0_se5_uart_active             l                             @   h      qup_ssc0_se5_uart_sleep          l                             @   i      qup_ssc0_se6_i2c_active         l                 @   j      qup_ssc0_se6_i2c_sleep          l                 @   k      qup_ssc0_se6_i3c_active         l     
     
         @   l      qup_ssc0_se6_i3c_sleep          l     !     !         @   m      qup_ssc0_se6_i3c_ibi_active         l     
     
         @   n      qup_ssc0_se6_i3c_ibi_sleep          l     !     !         @   o      qup_ssc0_se6_spi_active          l   X    X    X    X          @   p      qup_ssc0_se6_spi_sleep           l     !     !     !     !         @   q      qup_ssc0_se6_uart_active             l                             @   r      qup_ssc0_se6_uart_sleep          l                             @   s      qup_ssc0_se7_i2c_active         l                 @   t      qup_ssc0_se7_i2c_sleep          l                 @   u      qup_ssc0_se7_spi_active          l   X    X    X    X          @   v      qup_ssc0_se7_spi_sleep           l     !     !     !     !         @   w      qup_ssc0_se7_uart_active             l                             @   x      qup_ssc0_se7_uart_sleep          l                             @   y      qup_ssc0_se8_i2c_active         l                  @   z      qup_ssc0_se8_i2c_sleep          l                  @   {      qup_ssc0_se8_i3c_active         l     
      
         @   |      qup_ssc0_se8_i3c_sleep          l     !      !         @   }      qup_ssc0_se8_i3c_ibi_active         l     
      
         @   ~      qup_ssc0_se8_i3c_ibi_sleep          l     !      !         @         qup_ssc0_se10_i2c_active            l   !    "          @         qup_ssc0_se10_i2c_sleep         l   !    "          @         qup_ssc0_se10_spi_active             l   !X    "X    #X    $X          @         qup_ssc0_se10_spi_sleep          l   !  !   "  !   #  !   $  !         @         qup_ssc0_se10_uart_active            l   !     "     #     $           @         qup_ssc0_se10_uart_sleep             l   !     "     #     $           @            vdd_mxa          qcom,rpmh-arc-regulator         /vcs/vdd_mxa /vcs/vdd_mx                                             mx.lvl                                $             @  >      vdd_mxc          qcom,rpmh-arc-regulator         /vcs/vdd_mxc                                             mxc.lvl                               $             @  ?      vdd_cx           qcom,rpmh-arc-regulator         /vcs/vdd_cx                                          cx.lvl                                $             @  @      vdd_lpi_mx           qcom,rpmh-arc-regulator          /vcs/vdd_lpi_mx /vcs/vdd_ssc_mx                                          lmx.lvl                               $?         @  A      vdd_lpi_cx           qcom,rpmh-arc-regulator       !  /vcs/vdd_lpi_cx /vcs/vdd_ssc_int                                             lcx.lvl                               $?         @  B      clock-controller@100000          qcom,gcc-glymur qcom,cc-glymur           H                  0     @     P     `     p                                                              0     @                     /      /            0GCC_GPLL0_CM_PLL_TAYCAN_COMMON GCC_GPLL1_CM_PLL_TAYCAN_COMMON GCC_GPLL2_CM_PLL_TAYCAN_COMMON GCC_GPLL3_CM_PLL_TAYCAN_COMMON GCC_GPLL4_CM_PLL_TAYCAN_COMMON GCC_GPLL5_CM_PLL_TAYCAN_COMMON GCC_GPLL6_CM_PLL_TAYCAN_COMMON GCC_GPLL7_CM_PLL_TAYCAN_COMMON GCC_GPLL8_CM_PLL_TAYCAN_COMMON GCC_GPLL9_CM_PLL_TAYCAN_COMMON GCC_GPLL10_CM_PLL_ZONDA_COMMON GCC_GPLL11_CM_PLL_ZONDA_COMMON GCC_GPLL12_CM_PLL_ZONDA_COMMON GCC_GPLL13_CM_PLL_ZONDA_COMMON GCC_GPLL14_CM_PLL_TAYCAN_COMMON GCC_GPLL15_CM_PLL_TAYCAN_COMMON GCC_GPLL16_CM_PLL_TAYCAN_COMMON GCC_GPLL17_CM_PLL_TAYCAN_COMMON GCC_GPLL18_CM_PLL_TAYCAN_COMMON GCC_GPLL19_CM_PLL_TAYCAN_COMMON GCC_JBIST_CM_PLL_JBIST4_COMMON GCC_AHB2PHY_SWMAN GCC_AHB2PHY_BROADCAST_SWMAN GCC_CLK_CTL_REG GCC_RPU_RPUQ11_512_CL36L12_LE GCC_RPU_XPU4           :            @  C      clock-controller@1f40000          (   qcom,lpass_aon_cc-glymur qcom,cc-glymur       P   H                              `    p        &         <  0TCSR_TCSR_REGS LPASS_QDSP6SS_QDSP6SS_PUB LPASS_QDSP6SS_QDSP6SS_QDSP6SSV81_CORE_CC_SWI LPASS_QDSP6SS_PLL_PLL_CM_PLL_TAYCAN_COMMON LPASS_QDSP6SS_QDSP6SSV81_CORE_CC_REG LPASS_AON_CC_PLL_CM_PLL_TAYCAN_COMMON LPASS_AON_CC_AHB2PHY_SWMAN LPASS_AON_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_CC_LPASS_AON_CC_REG LPASS_LPI_TCM_REG         :            @   <      clock-controller@7700000          +   qcom,lpass_aon_mx_cc-glymur qcom,cc-glymur            Hp     p`    pp    p            0LPASS_AON_MX_CC_RO_PLL_CM_PLL_PONGO_COMMON LPASS_AON_MX_CC_AHB2PHY_SWMAN LPASS_AON_MX_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_MX_CC_LPASS_AON_MX_CC_REG            :            @  D      clock-controller@6bc0000          *   qcom,lpass_audio_cc-glymur qcom,cc-glymur         0   H              `    p                0LPASS_AUDIO_CC_PLL_CM_PLL_ZONDA_COMMON LPASS_AUDIO_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_AUDIO_CC_LCC_PLL_CM_PLL_JBIST4_COMMON LPASS_AUDIO_CC_AHB2PHY_SWMAN LPASS_AUDIO_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AUDIO_CC_LPASS_AUDIO_CC_REG            :            @  E      clock-controller@7b00000          )   qcom,lpass_core_cc-glymur qcom,cc-glymur          0   H     `    p            0             0LPASS_LPASS_CORE_CC_DIG_PLL_LPASS_CORE_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_LPASS_CORE_CC_REG LPASS_HW_AF_CORE LPASS_CORE_GDSC           :            @  F      clock-controller@6e40000          *   qcom,lpass_lpmla_cc-glymur qcom,cc-glymur             H     `    p       @         0LPASS_LPMLA_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPMLA_CC_AHB2PHY_SWMAN LPASS_LPMLA_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPMLA_CC_LPASS_LPMLA_CC_REG           :            @  G      clock-controller@7a00000             qcom,scc-glymur qcom,cc-glymur           H             0SSC_SCC_SCC_SCC_REG         :            @   =      cesta@7213000         '   qcom,lpass_cesta-glymur qcom,cc-glymur        (   H!0    !4    !8     !X    !_          @  0LPASS_CRMB LPASS_CRMB_PT LPASS_CRMC LPASS_CRMV LPASS_CRM_COMMON          @  H      glink            qcom,glink           G                                  proc-info           W                     xport-smem-config      edge-01         \                        h  @         r           {                     N          xport-qmp-config       edge-01       	  aop_adsp            \                                                         {                                  @             ipc_router           qcom,ipc_router    proc-info           adsp                                  devcfg-glink-xals      edge-01         SMEM            apss            IPCRTR          '            /           8            C                                   smp2p            qcom,smp2p     proc-info           K                       S           Z         smp2p-interrupts       intr-01         f                        R           k         intr-02         f                       R           k               smem          
   qcom,smem           oCORE_TOP_CSR                                   0                          @  @      cxstmtrace@16000000          qcom,stmtrace            H                                  lpistmtrace@7100000          qcom,stmtrace            H                           @      cxstmcfg@10002000            qcom,stmcfg          H                                 lpistmcfg@11c43000           qcom,stmcfg          H0                               cxetb@11c05000        	   qcom,tmc             HP          lpietb@11c45000       	   qcom,tmc             HP          tpdm@11c46000         
   qcom,tpdm            H`            tpdm_31            %                             tpdm@11c52000         
   qcom,tpdm            H             tpdm_62            &                                        tpdm@11c54000         
   qcom,tpdm            H@            tpdm_22            '                             tpdm@11c34000         
   qcom,tpdm            H@            tpdm_50            (                            tpdm@11c3c000         
   qcom,tpdm            H            tpdm_8             )                            qdss                                0         L       L      !_!_                     -   *        8           H   *      tpath_lpass_lpi_dl_tpda         q   +      ,      *            @   8      tpath_lpass_lpi_crm_dl_tpda         q   +      ,      *            @   9      tpath_lpass_lpi_audio_hm_dl_tpda            q   +      ,      *            @   :      tpath_lpi_stm           q   +       ,      *            @   .      tpath_lpi_etm           q   ,       *      ,            @   /      tpath_sdc_etm           q   ,      *            @   0      tpath_stm           q   -      *            @   1      tpath_sdc_itm           q   ,      *            @   2      tpath_lpass_lpi_noc         q   ,      *            @   3      tpath_lpi_aon_noc           q   ,      *            @   4      tpath_aoc           q   ,      *            @   5      tpath_enpu0_noc         q   +      ,      *            @   6      tpath_enpu1_noc         q   +      ,      *            @   7         cti@11c35000          	   qcom,cti          (  wddrss_lpi_slice0cti_cti_qc_cti_extended          HP          cti@11c42000          	   qcom,cti          $  wlpass_lpi_cti_sdc_2_cti_sdc_2_cscti          H           cti@11c4b000          	   qcom,cti          &  wlpass_lpi_qdsp6_qdsp6ss_qdsp6ss_cscti            Hİ          cti@11c51000          	   qcom,cti          "  wlpass_lpi_cti_3_cti_3_qc_cti_core            H          cti@11c41000          	   qcom,cti          "  wlpass_lpi_cti_1_cti_1_qc_cti_core            H          cti@11c3d000          	   qcom,cti          (  wddrss_lpi_slice1cti_cti_qc_cti_extended          H          qdss_lpi_csr@6ee0000             qcom,qdss_lpi_csr            H           funnel@10041000          qcom,tfunnel             H             @   -      funnel@11c44000          qcom,tfunnel             H@             @   ,      funnel@11c50000          qcom,tfunnel             H              @   +      funnel@11c04000          qcom,tfunnel             H@             @   *      tnoc@11c31000         
   qcom,tnoc              (         H               *                )  port_ddrss_lpi_slice0ddrss_lpi_trace_noc             @   (      tnoc@11c39000         
   qcom,tnoc              )         HÐ               9                )  port_ddrss_lpi_slice0ddrss_lpi_trace_noc             @   )      port_lpi_stm          	   qcom,gts                        q   .      port_lpi_etm          	   qcom,gts                       q   /      port_sdc_etm          	   qcom,gts                       q   0      port_stm          	   qcom,gts                        q   1      port_sdc_itm          	   qcom,gts               	        q   2      port_lpass_lpi_noc        	   qcom,gts                       q   3      port_lpi_aon_noc          	   qcom,gts                       q   4      port_aoc          	   qcom,gts               
        q   5      port_enpu0_noc        	   qcom,gts                       q   6      port_enpu1_noc        	   qcom,gts                       q   7      tpda@11c47000         
   qcom,tpda            Hp            tpda_26                               q   8         @   %      tpda@11c53000         
   qcom,tpda            H0            tpda_55            7                   q   9         @   &      tpda@11c55000         
   qcom,tpda            HP            tpda_56            8                   q   :         @   '      systemcache@20400000             qcom,systemcache          x   H @      `     !     !     !     !     "     "     "     "     #     #     #     #      (             0llcc_bcast_or_base llcc_bcast_and_base llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc8_base llcc9_base llcc10_base llcc11_base ddrss_regs_base             @                                @         llc-island           qcom,llc-island    islands                                                   island@c,80000000            H       X                         subsys_instance          qcom,subsys_instance                      spmi-bus@c400000             qcom,spmi-pmic-arb           H@                                        @  I   pmic@0           qcom,spmi-pmic           H                                                           @  J   spmi-vadc@92             qcom,spmi-vadc           H                                    $            (            -            1   ;   vadc_ch_cfg    VPH_PWR         ;VPH_PWR         A           G            Q            X           b           m                           u                                    vadc-avg-ch       gpio-map          therm_table          @   ;   therm_tb1                       @x    -     $        R    Ȩ   	   (l   m   %   1   z      %   * 5`  /    4    9    >    C  i  H  V  M  G|  R  ;`  W  18  \  )h  a  "  f  L  k    p  "  u    z      \        
            vadctm_meas_cfg                  VPH_PWR         ;VPH_PWR         A                           m                           u                             '                  spmi-bus@c436000             qcom,spmi-pmic-arb           H@                                        @  K      spmi-bus@c447000             qcom,spmi-pmic-arb           H@             -                                      @  L      ssc_qup_fw_cfg           qcom,qupfw-controller                 ssc_qup_0      se0_cfg                     P                                                                                     se1_cfg           @         Q                                                                                     se2_cfg                    R                                                                                     se3_cfg                    S                                                                                     se4_cfg           	                                                                                                 se5_cfg           	@         T                                                                                      se6_cfg           	         U                                                                                     se7_cfg           	                                                                                                 se8_cfg           
          V                                                                                     se10_cfg              
                                                                                                      ibi_ssc_0_cfg@7500000            qcom,ibi-controller          HP                                      (            T            /            4   G        =   !        Eok           @  M      ibi_ssc_1_cfg@7510000            qcom,ibi-controller          HQ                                      (           T            /            4   f        =           Eok           @  N      ibi_ssc_2_cfg@7520000            qcom,ibi-controller          HR                                      (           T            /            4           =           Eok           @  O      ibi_ssc_3_cfg@7530000            qcom,ibi-controller          HS                                      (           T            /            4          =          Eok           @  P      ibi_ssc_4_cfg@7540000            qcom,ibi-controller          HT                                      (           T            /            4          =          Eok           @  Q      ibi_ssc_5_cfg@7550000            qcom,ibi-controller          HU                                      (           T            /            4          =          Eok           @  R      ibi_ssc_6_cfg@7560000            qcom,ibi-controller          HV                                      (           T            /            4          =          Eok           @  S      ssc_pwr_domains          qcom,ssc-pwr-domain-controller        	  Lssc_gdsc            X   <@H      SSC_QUP_0@7900000            qcom,sscqup-controller           H             Lcore2x core s-ahb m-ahb          X   =Sd   =d4   =v   =^,        _           f           x           р                   	                      Eok     SSC_QUP_0_SE_0           qcom,se-controller                                                                                                                           /+          8           @           S           ]          j          ~            Lse-clk          X   =H      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              >           ?           @           A           B           C        Eok        SSC_QUP_0_SE_1           qcom,se-controller            @                                                                                                           /,          8   p        @           S           ]          j          ~            Lse-clk          X   = Ǟ      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              D           E           F           G           H           I        Eok        SSC_QUP_0_SE_2           qcom,se-controller                                                                                                                       /-          8            @            S           ]          j          ~            Lse-clk          X   =~E:      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            J           K           L           M           N           O           P           Q           R           S        Eok        SSC_QUP_0_SE_3           qcom,se-controller                                                                                                                       /.          8            @            S           ]          j          ~            Lse-clk          X   =w      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              T           U           V           W           X           Y        Eok        SSC_QUP_0_SE_4           qcom,se-controller                                                                                                                        //          8            @            S            ]          j          ~            Lse-clk          X   =*̉      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep            Z           [           \           ]           ^           _        Eok        SSC_QUP_0_SE_5           qcom,se-controller           @                                                                                                           /0          8   w        @           S            ]          j          ~            Lse-clk          X   =      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            `           a           b           c           d           e           f           g           h           i        Eok        SSC_QUP_0_SE_6           qcom,se-controller                                                                                                                      /1          8           @           S           ]          j          ~            Lse-clk          X   =      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            j           k           l           m           n           o           p           q           r           s        Eok        SSC_QUP_0_SE_7           qcom,se-controller                                                                                                                       /*          8            @            S            ]          j          ~            Lse-clk          X   =O      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep            t           u           v           w           x           y        Eok        SSC_QUP_0_SE_8           qcom,se-controller                                                                                                                       /)          8            @            S            ]          j          ~            Lse-clk          X   =pP      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              z           {           |           }           ~                   Eok        SSC_QUP_0_SE_10          qcom,se-controller                                           
                                             	                               /          8           @           S            ]          j          ~            Lse-clk          X   =      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep                                                                           Eok           qup_tcsr_info            qcom,quptcsr-controller               tcsr_cfg0              k           
        !           *            3              tcsr_cfg1                         
        !           *            3                 gsi_info             qcom,gsi-controller    gsi_qup_0           < @         CT        M           ^   Z      @  g                                                                        w                                 gsi_qup_1           < @         Ch        M           ^   [      @  g                                                                        w                               gsi_qup_2           < @         C        M           ^   d      @  g                                                                        w                               gsi_qup_3           < @         Cp        M           ^   j      @  g                                                                        w                               gsi_ssc_qup_0           <@         C            M            ^          @  g                   !  "  #  $  %  &  '  (        w                                  SlimbusBSP           qcom,smbus-controller                      SLIMBUS           0          LPASS                                @                                            2         B        slimbus-default                    	           	                	                   	,         sb_0_DeviceProps            	7           	:  0          	?         sb_1_DeviceProps            	7           	: 0          	?         sb_2_DeviceProps            	7           	: 0          	?         sb_3_DeviceProps            	7           	: 0          	?         sb_4_DeviceProps            	7           	: 0          	?         sb_5_DeviceProps            	7           	:             	?         sb_6_DeviceProps            	7           	:            	?         slimbus_gen_config_1            	M           	^LPASS           	l/vcs/vdd_lpi_cx         	x           	   	        	            	            	           	w0         	w@         	           	           
svs_npa_str         
	            
           
            
-           
=            
M           
`           
t           
           
         
           
           
                     "        sbMmpmRegParam          ,           0   j        ?           Vslimbus         b            n            {                      sbLpmMmpmRegParam           ,           0   {        ?           Vslimbus         b            n            {                      kernel_test_devices@0                                     H                 n      interrupt-controller@10140000            test,interrupt-control           H                                              @         device1@f101000          qcom,test,singleton          Device region mapping with name          H             device1         0test_reg_singleton              ]           4int1          device2@1011000          qcom,test,singleton       !  Device region mapping with index             device2          H                ^           4int2          device3@0            qcom,test,singleton         Device with no region mapping            device3          H                   _           4int3          device4@1            qcom,test,not_compatible            Device not compatible            device4          H                         `         
  4zero int4         device5@1010000          qcom,test,non_singleton          Device region mapping with name          H              device5         0test_reg_non_singleton              sw           @  T   core       boot            l                  mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config                                       debugtrace           qcom,debugtrace                  debugtools     version_tbl          qcom,image_version_tbl_idx                   eic       	   qcom,eic                                       Z      err_qdi          qcom,err_qdi            '  P        <           R   
      pd_mon     audio_process             qcom,pd_mon_user_process_config         _/ramfs/audio_lpai.mbn         3  t/rfs/root/vendor/firmware_mnt/image/audio_lpai.mbn          audio_process                                	  audio_pd          charger_process           qcom,pd_mon_user_process_config         _            t            charger_process                                charger_pd        qsh_process           qcom,pd_mon_user_process_config         _/ramfs/qsh.mbn        ,  t/rfs/root/vendor/firmware_mnt/image/qsh.mbn         qsh_process                              
  sensor_pd         ois_process           qcom,pd_mon_user_process_config         _/ramfs/ois_lpai.mbn       ,  t/rfs/root/vendor/firmware_mnt/image/ois.mbn         ois_process                                ois_pd        pd_mon_restart           qcom,pd_mon_restart                                  rcinit           qcom,rcinit_cfg    rcinit_config_spinor                          d        #  u0        ?           [           w                                                                rcinit_config                         !4        #          ?           [           w                                                                   servreg          qcom,servreg            msm/adsp/root_pd            3msm         Dadsp            Xroot_pd         o   J      sys_m            qcom,sys_m                             tms_dog          qcom,tms_dog            @        @        @        @        @        @        @                           /         H           e                                            tms_diag             qcom,tms_diag              0         products       pram_mgr             qcom,pram_mgr         	  SSC_PRAM       pram_partition     QMP         QMP         m          SENSORS         SENSORS         m         BUSES           BUSES           m          GPI         GPI         m  (       WIGIG           WIGIG           m          BUSES_DEBUG         BUSES_DEBUG         m         CAMERA_OIS          CAMERA_OIS          m         SENSORS_OIS         SENSORS_OIS         m               sdcloader            qcom,sdcloader     sdc_params            <                               	                     %           3a        sdc_physpool            =           S           i'P         ~               test       socinfra       gpio-pins                            active idle sleep wake                                                       icb    adsp       uart_sw          qcom,icb_bw_vote_sw              /        mem         high-spd low-spd idle                                           "                                                systemcache          qcom,systemcache-sw                       @   clients    client-0                                client-1                                client-2               -                 client-3               .                       llc-lpi-dump             qcom,llc-lpi-dump         J  !QSH_ISLAND_POOL SSC_ISLAND_POOL QSHTECH_ISLAND_POOL CAM_LLCC_ISLAND1_POOL         diag             qcom,adsp_core_diagcfg     diagcfg_cmd         ,           ?           X *          r =           U           Z                                                      -          I          ^          ~                                                            "                    2          O          f                                         !        diagcfg_param              @                                          0           D           X           l                                                                  	                     :           R           g   2        {                                    @                                                       )           @           N           m   <                                                                         2K           K           c           u                                 d                                             /            H            d            |                                                                              6            O  @         l   <                    Z                       QURTOS_ISLAND_POOL          QURTOS_ISLAND_POOL        diagcfg_early_log                         _        3                     I                              diagcfg_f3_trace            a           w                       qdsp_pm    config           qcom,config_data                                        lpassRegRange                                 m         l2ConfigRegRange                                    m          cores-array    core0              e                                        '   ?        =         core1              f                                      '        =         core2              g                                     '   "        =         core3              h                                       '           =         core4              i                                       '           =         core5              j                      Z                   '           =         core6              l                                     '   !        =         core7              m                      U                   '            =         core8              o                                       '   .        =         core9              {                                     '   2        =         core10             r                                       '   +        =         core11             v                                       '   /        =         core12             w                      _                    '        =         core13             y                                        '   1        =         core14             z                                      '   0        =         core15             |           	           p   q                      '   6   7        =         core16                                   l                    '        =         core17                                    o                  '        =         core18                                    m                    '        =         core19                                    n                 '   5        =            memories-array     memory0         J                      memory1         J                       clocks-array       clock0          P           V           ^         	  j/clk/cpu            r            {                      clock1          P           V           ^           jlpass_core_cc_core_clk          r            {                     clock2          P           V           ^           jlpass_audio_cc_bus_clk          r            {                     clock3          P           V           ^           jlpass_aon_cc_aon_h_clk          r            {                      clock4          P   6        V           ^           jlpass_aon_cc_lpi_noc_ls_clk         r            {                      clock5          P   7        V           ^           jlpass_aon_cc_lpi_noc_hs_clk         r            {                      clock6          P           V           ^            jlpass_audio_cc_slimbus_core_clk         r           {                     clock7          P           V           ^           jlpass_core_cc_lpm_core_clk          r            {                    clock8          P           V           ^            jlpass_core_cc_lpm_mem0_core_clk         r            {                    clock9          P           V           ^           jlpass_audio_cc_codec_mem_clk            r            {                     clock10         P           V           ^           jlpass_audio_cc_codec_mem0_clk           r            {                     clock11         P           V           ^           jlpass_audio_cc_codec_mem1_clk           r            {                     clock12         P           V           ^           jlpass_audio_cc_codec_mem2_clk           r            {                     clock13         P           V           ^           jlpass_audio_cc_codec_mem3_clk           r            {                     clock14         P           V           ^           jlpass_aon_mx_cc_va_mem0_clk         r            {                      clock15         P           V           ^           jlpass_aon_mx_cc_va_mem1_clk         r            {                      clock16         P           V           ^         $  jlpass_core_cc_sysnoc_mport_core_clk         r            {                     clock17         P           V           ^           jlpass_audio_cc_bus_timeout_clk          r            {                     clock18         P   C        V           ^         (  jlpass_aon_cc_lpass_0_lpmla_ahb_odsc_clk         r            {                      clock19         P   D        V           ^         (  jlpass_aon_cc_lpass_1_lpmla_ahb_odsc_clk         r            {                      clock20         P           V           ^         #  jlpass_core_cc_sysnoc_sway_core_clk          r            {                     clock21         P   ?        V           ^           jscc_ccd_ahb2ahb_m_clk           r            {                      clock22         P   @        V           ^           jscc_ccd_ahb2ahb_s_clk           r            {                      clock23         P   A        V           ^           jscc_ahb2ahb_s_clk           r            {                      clock24         P   B        V           ^           jlpass_aon_mx_cc_ibi_clk         r            {                      clock25         P   U        V           ^           jlpass_core_cc_resampler_clk         r            {                     clock26         P   Z        V           ^           jlpass_audio_cc_slimbus_clk          r            {                     clock27         P   \        V           ^           jlpass_core_cc_avsync_stc_clk            r            {                     clock28         P   ]        V           ^           jlpass_core_cc_avsync_atime_clk          r            {                     clock29         P   _        V           ^           jlpass_core_cc_hw_af_clk         r            {                     clock30         P   `        V           ^           jlpass_core_cc_hw_af_noc_clk         r            {                     clock31         P   p        V           ^         !  jlpass_lpmla_cc_lpass_0_lpmla_clk            r            {                      clock32         P   q        V           ^         !  jlpass_lpmla_cc_lpass_1_lpmla_clk            r            {                      clock33         P   v        V           ^            jlpass_aon_cc_enpu_scheduler_clk         r            {                      clock34         P   l        V           ^           jlpass_aon_cc_sdc_proc_fclk_clk          r            {                      clock35         P   o        V           ^           jscc_ccd_clk         r            {                      clock36         P   n        V           ^           jscc_smem_clk            r            {                         busport-array      busPort0                                                                               busPort1                             @                                                busPort2               A           @                                                busPort3               B           @                                                busPort4               C           @                                                busPort5               D           @                                                busPort6               E           @                                                busPort7                                                                          busPort8                                                                          busPort9                                                                          busPort10                                                                         busPort11                         @                                                busPort12                                                                         busPort13                                                                         busPort14                         @           `                                     busPort15                                                                         busPort16                         @                              1                 busPort17                         @                              1                 busPort18                                                                         busPort19                                                                         busPort20                                                                   $      busPort21                                                                   $      busPort22                                                                   $      busPort23                                                                    $      busPort24              !                                                     $      busPort25              "                                                     $      busPort26              $                                                     $      busPort27              %                                                     $      busPort28              '                                          '           $      busPort29              (                                                      $      busPort30              +                                                     $      busPort31              1                                                     $      busPort32              0                                                     $      busPort33              .                                                     $      busPort34              2                                                     $      busPort35              /                                                     $      busPort36              6                                 C                      $      busPort37              7                                 D                      $      busPort38              5                      n                               5      busPort39              ?                                                     ?         extroute-array     extBusRoute0                          %      extBusRoute1               A           (      extBusRoute2                          %      extBusRoute3               B           (      extBusRoute4                          %      extBusRoute5               C           (      extBusRoute6                          %      extBusRoute7               D           (      extBusRoute8                          %      extBusRoute9               E           (         mipsroute-array    mipsBwRoute0                          %      mipsBwRoute1               A           (         pwrDomain-array    pwrDomain0                     /core/cpu/latency                      P                                     pwrDomain1                   !  lpass_core_cc_lpass_core_hm_gdsc                       P                                     pwrDomain2                   !  lpass_aon_cc_lpass_audio_hm_gdsc                       P                                     pwrDomain3                                              P                                     pwrDomain4                     lpass_aon_cc_lpass_ssc_gdsc                     P                                        cestaBw-array      client0         -            7           >lpass      path0           J           X   5            cestaClk-array     clk0            P   l        jlpass_aon_cc_sdc_proc_fclk_clk           cestaPwrDomain-array       pwrDomain0                     lpass_aon_cc_lpass_ssc_gdsc          features-array     feature0                       e              w            feature1                       e                w              feature2                       e                w              feature3                       e             w          feature4                       e                w              feature5                       e                w              feature6                       e                w              feature7                        e                w              feature8                       e               w          feature9                       e                w          feature10                      e    5         w          feature11                      e    /        w          feature12                      e                w              feature13                       e               w            feature14                       e    $=X         w          feature15                       e             w    	'       feature16                       e                w              feature17                      e                w              feature18                       e                w              feature19                       e                w              feature20                      e                w              feature21                      e                w              feature22                      e                w              feature23                      e                w              feature24                      e                w              feature25                       e                w              feature26                       e                w              feature27                      e                w              feature28                       e                w              feature29                      e                w          feature30                      e                w              feature31                      e                w              feature32                      e                w              feature33                      e                w              feature34                       e                w              feature35                      e                w              feature36                      e                w              feature37                       e                w                    config_arch          qcom,config_arch       compensatedDdrBwTable         0  i                rp                            0  p                                             0  w    ܓ                   X                     0  ~    t            2                            0       U            2                            0      &6                                       0      ,           s                            0      2                                        0      8ـ                                        0      >                                        0                                          adspsnocVoteTable         8  i                                   '             8  p                                    '             8  w    ܓ                   X      X      '             8  ~    t            2                   '             8       U           e                   '             8      &6           O                   '             8      ,                              '             8      2                              '             8      8ـ           U                   '             8      >           *                   '             8                                '             compensatedLecDdrBwTable          0  i                        X                     0  p                 2                            0  w                                            0  ~    ׄ            s                            0      e                                         0                                          adspLecsnocVoteTable          8  i                        X                             8  p                 2                                    8  w                O                                    8  ~    ׄ                                                8      e            U                                    8                                                 compensatedMlDdrBwTable       0  i                 rp       X                     0  p    kI                                         0  w    Н             2                            0  ~   8                                        0     GW            s                            0     n!                                         0                                          adspMlsnocVoteTable       8  i                        X                             8  p    kI                                                 8  w    Н             2                                    8  ~   8            O                                    8     GW                                                8     n!            U                                    8                                                 adspToLpiNocFreqTable           i0 $         p$  	'         w3 
v        ~=P 5          M O         bkP j        mlToLpiNocFreqTable         i$ $         pO 	'         wRH 
v        ~   5          & O         0 j                 __symbols__         /soc            /soc/ipcc/ipcc@3e02000          /soc/ipcc/ipcc@3e40000          /soc/ipcc/ipcc@3e80000          /soc/ipcc/ipcc@3ec0000          /soc/ipcc_legacy@6888004            /soc/timetick/timer@68a2000         
/soc/timetick/timer@68a3000         /soc/pinctrl@f100000          !  /soc/pinctrl@f100000/qup0_se0_l0          !  '/soc/pinctrl@f100000/qup0_se0_l1          !  3/soc/pinctrl@f100000/qup0_se0_l2          !  ?/soc/pinctrl@f100000/qup0_se0_l3          !  K/soc/pinctrl@f100000/qup0_se1_l0          !  W/soc/pinctrl@f100000/qup0_se1_l1          !  c/soc/pinctrl@f100000/qup0_se1_l2          !  o/soc/pinctrl@f100000/qup0_se1_l3          !  {/soc/pinctrl@f100000/qup0_se2_l0          !  /soc/pinctrl@f100000/qup0_se2_l1          !  /soc/pinctrl@f100000/qup0_se2_l2          !  /soc/pinctrl@f100000/qup0_se2_l3          !  /soc/pinctrl@f100000/qup0_se2_l4          !  /soc/pinctrl@f100000/qup0_se2_l5          !  /soc/pinctrl@f100000/qup0_se2_l6          !  /soc/pinctrl@f100000/qup0_se3_l0          !  /soc/pinctrl@f100000/qup0_se3_l1          !  /soc/pinctrl@f100000/qup0_se3_l2          !  /soc/pinctrl@f100000/qup0_se3_l3          !  /soc/pinctrl@f100000/qup0_se3_l4          !  /soc/pinctrl@f100000/qup0_se3_l5          !  /soc/pinctrl@f100000/qup0_se3_l6          !  #/soc/pinctrl@f100000/qup0_se4_l0          !  //soc/pinctrl@f100000/qup0_se4_l1          !  ;/soc/pinctrl@f100000/qup0_se4_l2          !  G/soc/pinctrl@f100000/qup0_se4_l3          !  S/soc/pinctrl@f100000/qup0_se5_l0          !  _/soc/pinctrl@f100000/qup0_se5_l1          !  k/soc/pinctrl@f100000/qup0_se5_l2          !  w/soc/pinctrl@f100000/qup0_se5_l3          !  /soc/pinctrl@f100000/qup0_se6_l0          !  /soc/pinctrl@f100000/qup0_se6_l1          !  /soc/pinctrl@f100000/qup0_se6_l2          !  /soc/pinctrl@f100000/qup0_se6_l3          !  /soc/pinctrl@f100000/qup0_se7_l0          !  /soc/pinctrl@f100000/qup0_se7_l1          !  /soc/pinctrl@f100000/qup0_se7_l2          !  /soc/pinctrl@f100000/qup0_se7_l3          !  /soc/pinctrl@f100000/qup1_se0_l0          !  /soc/pinctrl@f100000/qup1_se0_l1          !  /soc/pinctrl@f100000/qup1_se0_l2          !  /soc/pinctrl@f100000/qup1_se0_l3          !  /soc/pinctrl@f100000/qup1_se1_l0          !  /soc/pinctrl@f100000/qup1_se1_l1          !  +/soc/pinctrl@f100000/qup1_se1_l2          !  7/soc/pinctrl@f100000/qup1_se1_l3          !  C/soc/pinctrl@f100000/qup1_se2_l0          !  O/soc/pinctrl@f100000/qup1_se2_l1          !  [/soc/pinctrl@f100000/qup1_se2_l2          !  g/soc/pinctrl@f100000/qup1_se2_l3          !  s/soc/pinctrl@f100000/qup1_se2_l4          !  /soc/pinctrl@f100000/qup1_se2_l5          !  /soc/pinctrl@f100000/qup1_se2_l6          !  /soc/pinctrl@f100000/qup1_se3_l0          !  /soc/pinctrl@f100000/qup1_se3_l1          !  /soc/pinctrl@f100000/qup1_se3_l2          !  /soc/pinctrl@f100000/qup1_se3_l3          !  /soc/pinctrl@f100000/qup1_se3_l4          !  /soc/pinctrl@f100000/qup1_se3_l5          !  /soc/pinctrl@f100000/qup1_se3_l6          !  /soc/pinctrl@f100000/qup1_se4_l0          !  /soc/pinctrl@f100000/qup1_se4_l1          !   /soc/pinctrl@f100000/qup1_se4_l2          !   /soc/pinctrl@f100000/qup1_se4_l3          !   /soc/pinctrl@f100000/qup1_se5_l0          !   '/soc/pinctrl@f100000/qup1_se5_l1          !   3/soc/pinctrl@f100000/qup1_se5_l2          !   ?/soc/pinctrl@f100000/qup1_se5_l3          !   K/soc/pinctrl@f100000/qup1_se6_l0          !   W/soc/pinctrl@f100000/qup1_se6_l1          !   c/soc/pinctrl@f100000/qup1_se6_l2          !   o/soc/pinctrl@f100000/qup1_se6_l3          !   {/soc/pinctrl@f100000/qup1_se7_l0          !   /soc/pinctrl@f100000/qup1_se7_l1          !   /soc/pinctrl@f100000/qup1_se7_l2          !   /soc/pinctrl@f100000/qup1_se7_l3          !   /soc/pinctrl@f100000/qup2_se0_l0          !   /soc/pinctrl@f100000/qup2_se0_l1          !   /soc/pinctrl@f100000/qup2_se0_l2          !   /soc/pinctrl@f100000/qup2_se0_l3          !   /soc/pinctrl@f100000/qup2_se1_l0          !   /soc/pinctrl@f100000/qup2_se1_l1          !   /soc/pinctrl@f100000/qup2_se1_l2          !   /soc/pinctrl@f100000/qup2_se1_l3          !  !/soc/pinctrl@f100000/qup2_se2_l0          !  !/soc/pinctrl@f100000/qup2_se2_l1          !  !#/soc/pinctrl@f100000/qup2_se2_l2          !  !//soc/pinctrl@f100000/qup2_se2_l3          !  !;/soc/pinctrl@f100000/qup2_se2_l4          !  !G/soc/pinctrl@f100000/qup2_se2_l5          !  !S/soc/pinctrl@f100000/qup2_se2_l6          !  !_/soc/pinctrl@f100000/qup2_se3_l0          !  !k/soc/pinctrl@f100000/qup2_se3_l1          !  !w/soc/pinctrl@f100000/qup2_se3_l2          !  !/soc/pinctrl@f100000/qup2_se3_l3          !  !/soc/pinctrl@f100000/qup2_se3_l4          !  !/soc/pinctrl@f100000/qup2_se3_l5          !  !/soc/pinctrl@f100000/qup2_se3_l6          !  !/soc/pinctrl@f100000/qup2_se4_l0          !  !/soc/pinctrl@f100000/qup2_se4_l1          !  !/soc/pinctrl@f100000/qup2_se4_l2          !  !/soc/pinctrl@f100000/qup2_se4_l3          !  !/soc/pinctrl@f100000/qup2_se5_l0          !  !/soc/pinctrl@f100000/qup2_se5_l1          !  !/soc/pinctrl@f100000/qup2_se5_l2          !  "/soc/pinctrl@f100000/qup2_se5_l3          !  "/soc/pinctrl@f100000/qup2_se6_l0          !  "/soc/pinctrl@f100000/qup2_se6_l1          !  "+/soc/pinctrl@f100000/qup2_se6_l2          !  "7/soc/pinctrl@f100000/qup2_se6_l3          !  "C/soc/pinctrl@f100000/qup2_se7_l0          !  "O/soc/pinctrl@f100000/qup2_se7_l1          !  "[/soc/pinctrl@f100000/qup2_se7_l2          !  "g/soc/pinctrl@f100000/qup2_se7_l3          !  "s/soc/pinctrl@f100000/qup3_se0_l0          !  "/soc/pinctrl@f100000/qup3_se0_l1          !  "/soc/pinctrl@f100000/qup3_se0_l2          !  "/soc/pinctrl@f100000/qup3_se0_l3          !  "/soc/pinctrl@f100000/qup3_se0_l4          !  "/soc/pinctrl@f100000/qup3_se0_l5          !  "/soc/pinctrl@f100000/qup3_se0_l6          !  "/soc/pinctrl@f100000/qup3_se0_l7          !  "/soc/pinctrl@f100000/qup3_se1_l0          !  "/soc/pinctrl@f100000/qup3_se1_l1          !  "/soc/pinctrl@f100000/qup3_se1_l2          !  "/soc/pinctrl@f100000/qup3_se1_l3          !  #/soc/pinctrl@f100000/qup3_se1_l4          !  #/soc/pinctrl@f100000/qup3_se1_l5          !  #/soc/pinctrl@f100000/qup3_se1_l6          !  #'/soc/pinctrl@f100000/qup3_se1_l7          (  #3/soc/pinctrl@f100000/GPIO_config_active       &  #F/soc/pinctrl@f100000/GPIO_config_idle         '  #W/soc/pinctrl@f100000/GPIO_config_sleep        &  #i/soc/pinctrl@f100000/GPIO_config_wake           #z/soc/pinctrl@7760000          !  #/soc/pinctrl@7760000/slimbus_clk          "  #/soc/pinctrl@7760000/slimbus_data         .  #/soc/pinctrl@7760000/slimbus_default_gpio_cfg           #/soc/pinctrl@75C0000          %  #/soc/pinctrl@75C0000/ssc_gpio_10_clk          %  #/soc/pinctrl@75C0000/ssc_gpio_11_clk          %  #/soc/pinctrl@75C0000/ssc_gpio_12_clk          %  #/soc/pinctrl@75C0000/ssc_gpio_13_clk          %  #/soc/pinctrl@75C0000/ssc_gpio_18_clk          %  $/soc/pinctrl@75C0000/ssc_gpio_19_clk          %  $/soc/pinctrl@75C0000/ssc_gpio_24_clk          %  $./soc/pinctrl@75C0000/ssc_gpio_25_clk          .  $>/soc/pinctrl@75C0000/ssc_gpio_26_clk_reserved         .  $W/soc/pinctrl@75C0000/ssc_gpio_27_clk_reserved         .  $p/soc/pinctrl@75C0000/ssc_gpio_28_clk_reserved         .  $/soc/pinctrl@75C0000/ssc_gpio_29_clk_reserved         .  $/soc/pinctrl@75C0000/ssc_gpio_30_clk_reserved         .  $/soc/pinctrl@75C0000/ssc_gpio_31_clk_reserved         .  $/soc/pinctrl@75C0000/ssc_gpio_34_clk_reserved         .  $/soc/pinctrl@75C0000/ssc_gpio_35_clk_reserved         $  %/soc/pinctrl@75C0000/ssc_gpio_6_clk       $  %/soc/pinctrl@75C0000/ssc_gpio_7_clk       %  %$/soc/pinctrl@75C0000/ssc_qupv3_se0_0          %  %4/soc/pinctrl@75C0000/ssc_qupv3_se0_1          &  %D/soc/pinctrl@75C0000/ssc_qupv3_se10_0         &  %U/soc/pinctrl@75C0000/ssc_qupv3_se10_1         &  %f/soc/pinctrl@75C0000/ssc_qupv3_se10_2         &  %w/soc/pinctrl@75C0000/ssc_qupv3_se10_3         /  %/soc/pinctrl@75C0000/ssc_qupv3_se11_0_reserved        /  %/soc/pinctrl@75C0000/ssc_qupv3_se11_1_reserved        /  %/soc/pinctrl@75C0000/ssc_qupv3_se11_2_reserved        /  %/soc/pinctrl@75C0000/ssc_qupv3_se11_3_reserved        /  %/soc/pinctrl@75C0000/ssc_qupv3_se12_0_reserved        /  &
/soc/pinctrl@75C0000/ssc_qupv3_se12_1_reserved        /  &$/soc/pinctrl@75C0000/ssc_qupv3_se13_0_reserved        /  &>/soc/pinctrl@75C0000/ssc_qupv3_se13_1_reserved        /  &X/soc/pinctrl@75C0000/ssc_qupv3_se13_2_reserved        /  &r/soc/pinctrl@75C0000/ssc_qupv3_se13_3_reserved        /  &/soc/pinctrl@75C0000/ssc_qupv3_se14_0_reserved        /  &/soc/pinctrl@75C0000/ssc_qupv3_se14_1_reserved        %  &/soc/pinctrl@75C0000/ssc_qupv3_se1_0          %  &/soc/pinctrl@75C0000/ssc_qupv3_se1_1          .  &/soc/pinctrl@75C0000/ssc_qupv3_se1_2_reserved         .  &/soc/pinctrl@75C0000/ssc_qupv3_se1_3_reserved         %  '/soc/pinctrl@75C0000/ssc_qupv3_se2_0          %  '"/soc/pinctrl@75C0000/ssc_qupv3_se2_1          %  '2/soc/pinctrl@75C0000/ssc_qupv3_se2_2          %  'B/soc/pinctrl@75C0000/ssc_qupv3_se2_3          %  'R/soc/pinctrl@75C0000/ssc_qupv3_se2_4          %  'b/soc/pinctrl@75C0000/ssc_qupv3_se2_5          %  'r/soc/pinctrl@75C0000/ssc_qupv3_se3_0          %  '/soc/pinctrl@75C0000/ssc_qupv3_se3_1          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_0          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_1          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_2          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_3          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_4          %  '/soc/pinctrl@75C0000/ssc_qupv3_se4_5          %  '/soc/pinctrl@75C0000/ssc_qupv3_se5_0          %  (/soc/pinctrl@75C0000/ssc_qupv3_se5_1          %  (/soc/pinctrl@75C0000/ssc_qupv3_se5_2          %  ("/soc/pinctrl@75C0000/ssc_qupv3_se5_3          %  (2/soc/pinctrl@75C0000/ssc_qupv3_se6_0          %  (B/soc/pinctrl@75C0000/ssc_qupv3_se6_1          %  (R/soc/pinctrl@75C0000/ssc_qupv3_se6_2          %  (b/soc/pinctrl@75C0000/ssc_qupv3_se6_3          %  (r/soc/pinctrl@75C0000/ssc_qupv3_se7_0          %  (/soc/pinctrl@75C0000/ssc_qupv3_se7_1          %  (/soc/pinctrl@75C0000/ssc_qupv3_se7_2          %  (/soc/pinctrl@75C0000/ssc_qupv3_se7_3          %  (/soc/pinctrl@75C0000/ssc_qupv3_se8_0          %  (/soc/pinctrl@75C0000/ssc_qupv3_se8_1          .  (/soc/pinctrl@75C0000/ssc_qupv3_se9_0_reserved         .  (/soc/pinctrl@75C0000/ssc_qupv3_se9_1_reserved         -  )/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_sleep       -  )3/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_active          ,  )K/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_sleep       1  )b/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_active          0  )~/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_sleep       -  )/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_sleep       -  )/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_sleep       1  )/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_active          0  */soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_sleep       -  *./soc/pinctrl@75C0000/qup_ssc0_se2_i2c_active          ,  *F/soc/pinctrl@75C0000/qup_ssc0_se2_i2c_sleep       -  *]/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_active          ,  *u/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_sleep       1  */soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_active          0  */soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_sleep       -  */soc/pinctrl@75C0000/qup_ssc0_se2_spi_active          ,  */soc/pinctrl@75C0000/qup_ssc0_se2_spi_sleep       .  */soc/pinctrl@75C0000/qup_ssc0_se2_uart_active         -  +/soc/pinctrl@75C0000/qup_ssc0_se2_uart_sleep          -  +#/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_active          ,  +;/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_sleep       -  +R/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_active          ,  +j/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_sleep       1  +/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_active          0  +/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_sleep       -  +/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_active          ,  +/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_sleep       -  +/soc/pinctrl@75C0000/qup_ssc0_se4_spi_active          ,  +/soc/pinctrl@75C0000/qup_ssc0_se4_spi_sleep       .  ,/soc/pinctrl@75C0000/qup_ssc0_se4_uart_active         -  ,//soc/pinctrl@75C0000/qup_ssc0_se4_uart_sleep          -  ,G/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_active          ,  ,_/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_sleep       -  ,v/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_active          ,  ,/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_sleep       1  ,/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_active          0  ,/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_sleep       -  ,/soc/pinctrl@75C0000/qup_ssc0_se5_spi_active          ,  ,/soc/pinctrl@75C0000/qup_ssc0_se5_spi_sleep       .  -/soc/pinctrl@75C0000/qup_ssc0_se5_uart_active         -  -$/soc/pinctrl@75C0000/qup_ssc0_se5_uart_sleep          -  -</soc/pinctrl@75C0000/qup_ssc0_se6_i2c_active          ,  -T/soc/pinctrl@75C0000/qup_ssc0_se6_i2c_sleep       -  -k/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_active          ,  -/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_sleep       1  -/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_active          0  -/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_sleep       -  -/soc/pinctrl@75C0000/qup_ssc0_se6_spi_active          ,  -/soc/pinctrl@75C0000/qup_ssc0_se6_spi_sleep       .  . /soc/pinctrl@75C0000/qup_ssc0_se6_uart_active         -  ./soc/pinctrl@75C0000/qup_ssc0_se6_uart_sleep          -  .1/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_active          ,  .I/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_sleep       -  .`/soc/pinctrl@75C0000/qup_ssc0_se7_spi_active          ,  .x/soc/pinctrl@75C0000/qup_ssc0_se7_spi_sleep       .  ./soc/pinctrl@75C0000/qup_ssc0_se7_uart_active         -  ./soc/pinctrl@75C0000/qup_ssc0_se7_uart_sleep          -  ./soc/pinctrl@75C0000/qup_ssc0_se8_i2c_active          ,  ./soc/pinctrl@75C0000/qup_ssc0_se8_i2c_sleep       -  ./soc/pinctrl@75C0000/qup_ssc0_se8_i3c_active          ,  //soc/pinctrl@75C0000/qup_ssc0_se8_i3c_sleep       1  //soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_active          0  /:/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_sleep       .  /U/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_active         -  /n/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_sleep          .  //soc/pinctrl@75C0000/qup_ssc0_se10_spi_active         -  //soc/pinctrl@75C0000/qup_ssc0_se10_spi_sleep          /  //soc/pinctrl@75C0000/qup_ssc0_se10_uart_active        .  //soc/pinctrl@75C0000/qup_ssc0_se10_uart_sleep           //soc/vdd_mxa            //soc/vdd_mxc            //soc/vdd_cx         0/soc/vdd_lpi_mx         0/soc/vdd_lpi_cx         0/soc/clock-controller@100000            0/soc/clock-controller@1f40000           0(/soc/clock-controller@7700000           08/soc/clock-controller@6bc0000           0G/soc/clock-controller@7b00000           0U/soc/clock-controller@6e40000           0d/soc/clock-controller@7a00000           0h/soc/cesta@7213000        "  0t/soc/qdss/tpath_lpass_lpi_dl_tpda         &  0/soc/qdss/tpath_lpass_lpi_crm_dl_tpda         +  0/soc/qdss/tpath_lpass_lpi_audio_hm_dl_tpda          0/soc/qdss/tpath_lpi_stm         0/soc/qdss/tpath_lpi_etm         0/soc/qdss/tpath_sdc_etm         0/soc/qdss/tpath_stm         0/soc/qdss/tpath_sdc_itm         1/soc/qdss/tpath_lpass_lpi_noc           1/soc/qdss/tpath_lpi_aon_noc         11/soc/qdss/tpath_aoc         1;/soc/qdss/tpath_enpu0_noc           1K/soc/qdss/tpath_enpu1_noc           1[/soc/funnel@10041000            1w/soc/funnel@11c44000            1/soc/funnel@11c50000            1/soc/funnel@11c04000            M/soc/tnoc@11c31000          1/soc/tnoc@11c39000          0z/soc/tpda@11c47000          0/soc/tpda@11c53000          0/soc/tpda@11c55000          1/soc/systemcache@20400000           1/soc/spmi-bus@c400000           1/soc/spmi-bus@c400000/pmic@0          6  2	/soc/spmi-bus@c400000/pmic@0/spmi-vadc@92/therm_table           2/soc/spmi-bus@c436000           2/soc/spmi-bus@c447000           2)/soc/ibi_ssc_0_cfg@7500000          27/soc/ibi_ssc_1_cfg@7510000          2E/soc/ibi_ssc_2_cfg@7520000          2S/soc/ibi_ssc_3_cfg@7530000          2a/soc/ibi_ssc_4_cfg@7540000          2o/soc/ibi_ssc_5_cfg@7550000          2}/soc/ibi_ssc_6_cfg@7560000        9  2/soc/kernel_test_devices@0/interrupt-controller@10140000            2/sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg client protocol-name protocol-idx interrupt-parent interrupts #signals client-mapping offset out-mask timer-name timer-freq timer-num timer-interrupt ngpios width id qcom,strongpull egpio gpio-controller #gpio-cells interrupt-types interrupt-names summary-targetproc global-ctxt-name mux config qcom,slewrate qcom,sleep-config regulator-name regulator-min-microvolt regulator-max-microvolt regulator-init-microvolt qcom,resource-name qcom,all-pd-regulator qcom,lpr-enable qcom,drv-id reg-names #clock-cells supported-hosts host remote-host fifo-size mtu-size irq-out qos-max-rate channel-name mailbox-area-size-bytes master-mailbox-size-bytes max-tx-pending-items is-master mailbox-desc-start host-name transport remote-ss ch-name options priority stack-size intents host-id fflags max-entries dest irq core-top-csr-str tcsr-base mutex-offsets-data wonce-offsets base_port num_ports atid sync_period tpdm_name tpda tpda_port dataset cmb_size cti_channels cti_triggers dbg_regs pwrdbg_ctrl_reg lpi_funnel lpi_funnel_port port_ddrss_lpi_slice0ddrss_lpi_trace_noc tpath cti_name tnoc_id tnoc_funnel_name tstype tpda_name port_occupied_mask llcc-common-reg llcc-lcp-reg channel-mode-check lpi-base num-lpi-channels scid value use-interrupt sid mid pmic bid therm-tbl label hw-ch hw-settle avg-sp dec-ratio cal-method scaling scale-fcn pull-up asid arr_id table hw-common-params adctm-hw-params trip-range num_ssc_qup ibi_base protocol se_island_config tre_list_size ibi_se_index se_mode load_fw dfs_mode ibi_id gpii gpii_irq mgr_irq status clock-names clocks qup_id qup_common_offset se_wrapper_base_offset core_frequency qup_flags num_se sdc_gpii_list core_offset ibi_instance se_flags FIFO_MODE protocol_supported interface_supported num_gpiis ring_size_multiplier core_irq pdc_irq parent_wakeup_gpio shared_se od_frequency i2c_hs_i3c_src_freq is_pipeline_enable pinctrl-names pinctrl-0 pinctrl-1 pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 num_top_qups irq_num qup0_cfg qup1_cfg qup2_cfg qup3_cfg gsi_pa tcsr_addr tcsr_gpii_offset tcsr_irq gpii_interrupts num_gpii active uStructVer pszInstName uaMasterEA pszHwioBase uHwioBaseOffset uHwioBase hBamDev uIntId uBamIntId uMyEE smbus_clk smbus_data uGpioIntNum uaNumEndPoints uaVoltageVote bIsLpiTlmm LA uaEA uDataLineMask num_device_props tlmm_name_str svs_npa_str is_master default_clock_gear prog_bam_trust island_vote subsystem_sleep_vote tlmm_clk_offset tlmm_data_offset tlmm_clk_val tlmm_data_val svs_npa use_gpio_int log_level no_retention num_local_ports local_port_base local_channel_base shared_channel_base num_local_counters is_lpm_used_for_mgr_bam_trans lpm_mgr_sb_region_base lpm_mgr_sb_region_size is_lpm_sat_sb_region_dump_enable lpm_sat_sb_region_base lpm_sat_sb_region_size ee_assign rev MmpmCoreIdType MmpmCoreInstanceIdType pClientName pwrCtrlFlag callBackFlag MMPM_Callback cbFcnStackSize interrupt-controller #interrupt-cells message service_id instance_id qdss_service_id image_idx eic_crash_enable eic_crash_type eic_crash_delay pd_timeout_exit_msec threshold_timeout_sec num_pdrs_log pd_binary_local_path pd_binary_remote_path pd_name pd_mon_install_attr pd_mon_image_sw_id subdomain_name pd_mon_restart_enable pd_mon_dump_disable rcinit_term_err_fatal_enable rcinit_term_timeout rcinit_term_timeout_group_0 rcinit_term_timeout_group_1 rcinit_term_timeout_group_2 rcinit_term_timeout_group_3 rcinit_term_timeout_group_4 rcinit_term_timeout_group_5 rcinit_term_timeout_group_6 rcinit_term_timeout_group_7 rcinit_term_latency_enable servreg_local_domain servreg_soc_name servreg_domain_name servreg_subdomain_name servreg_qmi_instance_id ssctl_srv sys_m_smem_ssr_res wdog_nmi_time wdog_bite_time wdog_bark_time wdog_status wdog_ctl wdog_bite_nmi wdog_reset wdog_nmi_time_data_bmsk wdog_bite_time_data_bmsk wdog_bark_time_data_bmsk wdog_ctl_wdog_to_nmi_en_bmsk wdog_ctl_wdog_to_nmi_en_shft wdog_ctl_enable_bmsk wdog_ctl_enable_shft wdog_reset_wdog_reset_shft image_id pram_name pt_name wdog_irq_num err_irq_num code_ram_addr data_ram_addr code_ram_size data_ram_size pram_addr ssc_sdc_physpool_addr ssc_sdc_physpool_size ipcmem_physpool_addr ipcmem_physpool_size free-gpios interconnects interconnect-names interconnect-modes interconnect-0 interconnect-1 interconnect-2 llccs scid-mapping-reg usecase-id dump-pools diag_cmd_request_f diag_start_stress_test_f diag_stress_test_loopback diag_legacy_health_count_base diag_get_max_req_pkt_len diag_delay_health_count_base diag_dcm_cmd_reg_test_base diag_ulogdiag_processor_id diag_subsys_id_base diag_flow_control_count_base diag_dsm_chained_count_base diag_get_cmd_reg_tbl diag_subsys_mask_retrieval_base diag_f3_trace_set_config diag_tx_mode_config diag_stress_test_delayed_rsp diag_drop_threshold_config diag_query_enable diag_get_time_api diag_get_drop_per diag_uimage_health_stats diag_start_stress_test_adv_f diag_health_stats_base diag_get_set_drain_param diag_set_drain_prop diag_health_report_config diag_get_set_client_settings diag_lock_buffer_api diag_instance_id_base diag_err_ulog_size diag_debug_ulog_size diag_cmd_ulog_size diag_data_ulog_size diag_qdss_ulog_size diag_ctrl_ulog_size diag_listener_ulog_size diag_sendbuf_dbg_ulog_size diag_dsqb_ulog_size diag_mpd_drain_timer_len diag_mpd_buf_commit_thresh_per diag_mpd_buf_drain_thresh_per diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_drain_timer_len diag_event_send_max diag_event_heap_size diag_ctrl_send_buf_size diag_ctrl_read_buf_size diag_cmd_read_buf_size diag_event_sec_heap_size diag_dci_read_buf_size diag_rsp_heap_size diag_heap_size diag_f3_trace_buf_size diag_buf_size diag_rsp_alloc_retry_timer_len diag_mask_notify_timer_len diag_tx_sleep_threshold_default diag_tx_sleep_time_default diag_core_pd_drain_threshold diag_sio_timeout_timer_len diag_cmd_read_tout_timer_len diag_max_active_listeners diag_many_drain_per_mark diag_few_drain_per_mark diag_hdlc_pad_len diag_stress_task_sleep_complete diag_buf_commit_threshold diag_buffer_default_lock_state diag_drop_flow_cnt_incr diag_drop_per_step_max diag_drop_per_threshold_max diag_deferrable_timer diag_deferrable_timer_ex diag_send_data_buf_size_max diag_min_send_data_size diag_msg_fmt_str_arg_size diag_event_rpt_pkt_len_size_nrt diag_event_rpt_pkt_size_nrt diag_event_send_max_nrt diag_event_timer_len_nrt diag_tx_sleep_threshold_nrt diag_tx_sleep_time_nrt diag_drain_timer_len_nrt diagbuf_commit_threshold_nrt diag_mpd_commit_thresh_nrt_per diag_uimage_drain_timer_len diag_uimage_buf_high_per_wm diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool diag_early_log_control diag_early_log_mask diag_early_event_mask diag_early_message_mask diag_f3_trace_control diag_f3_trace_detail_mask diag_f3_trace_version THREAD_NUMBER OVERHANG_VOTE_TIMEOUT_MS DEBUG_LEVEL baseAddr physAddr coreId pwrDomain coreClockInstances masterBusPortInstances slaveBusPortInstances numInstances memId clkId clkType clkCntlType clkName clkSrcId memoryId portConnection busClk regProgClocks icbarbMaster accessPort icbarbSlave masterPort slavePort pwrDomainName pwrDomainType intrReinitTrigger intrReinitDone securityClocks clientNum routes hw_instance masterIcbPort slaveIcbPort min index0 index1 index2 index3 index4 index5 index6 index7 index8 index9 index10 soc ipcc_mproc ipcc_compute_l0 ipcc_compute_l1 ipcc_periph ipcc_legacy SystemTimer WakeUpTimer tlmm qup0_se0_l0 qup0_se0_l1 qup0_se0_l2 qup0_se0_l3 qup0_se1_l0 qup0_se1_l1 qup0_se1_l2 qup0_se1_l3 qup0_se2_l0 qup0_se2_l1 qup0_se2_l2 qup0_se2_l3 qup0_se2_l4 qup0_se2_l5 qup0_se2_l6 qup0_se3_l0 qup0_se3_l1 qup0_se3_l2 qup0_se3_l3 qup0_se3_l4 qup0_se3_l5 qup0_se3_l6 qup0_se4_l0 qup0_se4_l1 qup0_se4_l2 qup0_se4_l3 qup0_se5_l0 qup0_se5_l1 qup0_se5_l2 qup0_se5_l3 qup0_se6_l0 qup0_se6_l1 qup0_se6_l2 qup0_se6_l3 qup0_se7_l0 qup0_se7_l1 qup0_se7_l2 qup0_se7_l3 qup1_se0_l0 qup1_se0_l1 qup1_se0_l2 qup1_se0_l3 qup1_se1_l0 qup1_se1_l1 qup1_se1_l2 qup1_se1_l3 qup1_se2_l0 qup1_se2_l1 qup1_se2_l2 qup1_se2_l3 qup1_se2_l4 qup1_se2_l5 qup1_se2_l6 qup1_se3_l0 qup1_se3_l1 qup1_se3_l2 qup1_se3_l3 qup1_se3_l4 qup1_se3_l5 qup1_se3_l6 qup1_se4_l0 qup1_se4_l1 qup1_se4_l2 qup1_se4_l3 qup1_se5_l0 qup1_se5_l1 qup1_se5_l2 qup1_se5_l3 qup1_se6_l0 qup1_se6_l1 qup1_se6_l2 qup1_se6_l3 qup1_se7_l0 qup1_se7_l1 qup1_se7_l2 qup1_se7_l3 qup2_se0_l0 qup2_se0_l1 qup2_se0_l2 qup2_se0_l3 qup2_se1_l0 qup2_se1_l1 qup2_se1_l2 qup2_se1_l3 qup2_se2_l0 qup2_se2_l1 qup2_se2_l2 qup2_se2_l3 qup2_se2_l4 qup2_se2_l5 qup2_se2_l6 qup2_se3_l0 qup2_se3_l1 qup2_se3_l2 qup2_se3_l3 qup2_se3_l4 qup2_se3_l5 qup2_se3_l6 qup2_se4_l0 qup2_se4_l1 qup2_se4_l2 qup2_se4_l3 qup2_se5_l0 qup2_se5_l1 qup2_se5_l2 qup2_se5_l3 qup2_se6_l0 qup2_se6_l1 qup2_se6_l2 qup2_se6_l3 qup2_se7_l0 qup2_se7_l1 qup2_se7_l2 qup2_se7_l3 qup3_se0_l0 qup3_se0_l1 qup3_se0_l2 qup3_se0_l3 qup3_se0_l4 qup3_se0_l5 qup3_se0_l6 qup3_se0_l7 qup3_se1_l0 qup3_se1_l1 qup3_se1_l2 qup3_se1_l3 qup3_se1_l4 qup3_se1_l5 qup3_se1_l6 qup3_se1_l7 GPIO_config_active GPIO_config_idle GPIO_config_sleep GPIO_config_wake lpi_tlmm slimbus_clk slimbus_data slimbus_default_gpio_cfg ssc_tlmm ssc_gpio_10_clk ssc_gpio_11_clk ssc_gpio_12_clk ssc_gpio_13_clk ssc_gpio_18_clk ssc_gpio_19_clk ssc_gpio_24_clk ssc_gpio_25_clk ssc_gpio_26_clk_reserved ssc_gpio_27_clk_reserved ssc_gpio_28_clk_reserved ssc_gpio_29_clk_reserved ssc_gpio_30_clk_reserved ssc_gpio_31_clk_reserved ssc_gpio_34_clk_reserved ssc_gpio_35_clk_reserved ssc_gpio_6_clk ssc_gpio_7_clk ssc_qupv3_se0_0 ssc_qupv3_se0_1 ssc_qupv3_se10_0 ssc_qupv3_se10_1 ssc_qupv3_se10_2 ssc_qupv3_se10_3 ssc_qupv3_se11_0_reserved ssc_qupv3_se11_1_reserved ssc_qupv3_se11_2_reserved ssc_qupv3_se11_3_reserved ssc_qupv3_se12_0_reserved ssc_qupv3_se12_1_reserved ssc_qupv3_se13_0_reserved ssc_qupv3_se13_1_reserved ssc_qupv3_se13_2_reserved ssc_qupv3_se13_3_reserved ssc_qupv3_se14_0_reserved ssc_qupv3_se14_1_reserved ssc_qupv3_se1_0 ssc_qupv3_se1_1 ssc_qupv3_se1_2_reserved ssc_qupv3_se1_3_reserved ssc_qupv3_se2_0 ssc_qupv3_se2_1 ssc_qupv3_se2_2 ssc_qupv3_se2_3 ssc_qupv3_se2_4 ssc_qupv3_se2_5 ssc_qupv3_se3_0 ssc_qupv3_se3_1 ssc_qupv3_se4_0 ssc_qupv3_se4_1 ssc_qupv3_se4_2 ssc_qupv3_se4_3 ssc_qupv3_se4_4 ssc_qupv3_se4_5 ssc_qupv3_se5_0 ssc_qupv3_se5_1 ssc_qupv3_se5_2 ssc_qupv3_se5_3 ssc_qupv3_se6_0 ssc_qupv3_se6_1 ssc_qupv3_se6_2 ssc_qupv3_se6_3 ssc_qupv3_se7_0 ssc_qupv3_se7_1 ssc_qupv3_se7_2 ssc_qupv3_se7_3 ssc_qupv3_se8_0 ssc_qupv3_se8_1 ssc_qupv3_se9_0_reserved ssc_qupv3_se9_1_reserved qup_ssc0_se0_i2c_active qup_ssc0_se0_i2c_sleep qup_ssc0_se0_i3c_active qup_ssc0_se0_i3c_sleep qup_ssc0_se0_i3c_ibi_active qup_ssc0_se0_i3c_ibi_sleep qup_ssc0_se1_i2c_active qup_ssc0_se1_i2c_sleep qup_ssc0_se1_i3c_active qup_ssc0_se1_i3c_sleep qup_ssc0_se1_i3c_ibi_active qup_ssc0_se1_i3c_ibi_sleep qup_ssc0_se2_i2c_active qup_ssc0_se2_i2c_sleep qup_ssc0_se2_i3c_active qup_ssc0_se2_i3c_sleep qup_ssc0_se2_i3c_ibi_active qup_ssc0_se2_i3c_ibi_sleep qup_ssc0_se2_spi_active qup_ssc0_se2_spi_sleep qup_ssc0_se2_uart_active qup_ssc0_se2_uart_sleep qup_ssc0_se3_i2c_active qup_ssc0_se3_i2c_sleep qup_ssc0_se3_i3c_active qup_ssc0_se3_i3c_sleep qup_ssc0_se3_i3c_ibi_active qup_ssc0_se3_i3c_ibi_sleep qup_ssc0_se4_i2c_active qup_ssc0_se4_i2c_sleep qup_ssc0_se4_spi_active qup_ssc0_se4_spi_sleep qup_ssc0_se4_uart_active qup_ssc0_se4_uart_sleep qup_ssc0_se5_i2c_active qup_ssc0_se5_i2c_sleep qup_ssc0_se5_i3c_active qup_ssc0_se5_i3c_sleep qup_ssc0_se5_i3c_ibi_active qup_ssc0_se5_i3c_ibi_sleep qup_ssc0_se5_spi_active qup_ssc0_se5_spi_sleep qup_ssc0_se5_uart_active qup_ssc0_se5_uart_sleep qup_ssc0_se6_i2c_active qup_ssc0_se6_i2c_sleep qup_ssc0_se6_i3c_active qup_ssc0_se6_i3c_sleep qup_ssc0_se6_i3c_ibi_active qup_ssc0_se6_i3c_ibi_sleep qup_ssc0_se6_spi_active qup_ssc0_se6_spi_sleep qup_ssc0_se6_uart_active qup_ssc0_se6_uart_sleep qup_ssc0_se7_i2c_active qup_ssc0_se7_i2c_sleep qup_ssc0_se7_spi_active qup_ssc0_se7_spi_sleep qup_ssc0_se7_uart_active qup_ssc0_se7_uart_sleep qup_ssc0_se8_i2c_active qup_ssc0_se8_i2c_sleep qup_ssc0_se8_i3c_active qup_ssc0_se8_i3c_sleep qup_ssc0_se8_i3c_ibi_active qup_ssc0_se8_i3c_ibi_sleep qup_ssc0_se10_i2c_active qup_ssc0_se10_i2c_sleep qup_ssc0_se10_spi_active qup_ssc0_se10_spi_sleep qup_ssc0_se10_uart_active qup_ssc0_se10_uart_sleep vdd_mxa vdd_mxc vdd_cx vdd_lpi_mx vdd_lpi_cx gcc lpass_aon_cc lpass_aon_mx_cc lpass_audio_cc lpass_core_cc lpass_lpmla_cc scc lpass_cesta tpath_lpass_lpi_dl_tpda tpath_lpass_lpi_crm_dl_tpda tpath_lpass_lpi_audio_hm_dl_tpda tpath_lpi_stm tpath_lpi_etm tpath_sdc_etm tpath_stm tpath_sdc_itm tpath_lpass_lpi_noc tpath_lpi_aon_noc tpath_aoc tpath_enpu0_noc tpath_enpu1_noc in_fun0_in_fun0_cxatbfunnel lpass_lpi_fun0_fun0_cxatbfunnel lpass_lpi_fun1_fun1_cxatbfunnel aoss_apb_fun0 ddrss_lpi_slice1ddrss_lpi_trace_noc systemcache0 spmi_bus pmk8850_0 therm_table spmi_bus1 spmi_bus2 ibi_ssc_0_cfg ibi_ssc_1_cfg ibi_ssc_2_cfg ibi_ssc_3_cfg ibi_ssc_4_cfg ibi_ssc_5_cfg ibi_ssc_6_cfg intc sw    X   8  
x   (              
@                                 qcom,glymur          qcom,glymur                             board-id             ,audio_process-glymur-1.0-adsp            6            soc                                   @      cxstmtrace@16000000          qcom,stmtrace            H               L           V   @      lpistmtrace@7100000          qcom,stmtrace            H              L           V   @         sw           @      core       cpt_boot_test            `      `            l             w      test1                                                                                    l             w         *   My Secret Message, Please keep it secret!         test2         test_types                       U                              
   󵳥U#4                             4VxeC!         %               (  <穣4VxܺvT2         M      test_pic_3        	   qcom,pic            d             test_uart1        
   qcom,uart           d                          lbase rx tx        test_uart2        
   qcom,uart           d              PD_Access_control           v  U      OEM_Flavor_Validation                       mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config                       !               debugtrace           qcom,debugtrace            	      debugtools     tms_diag             qcom,tms_diag                    eic       	   qcom,eic                                       Z      version_tbl          qcom,image_version_tbl_idx                      power      qdsp_pm    pd           qcom,pd-audio-process                             diag             qcom,audio_user_diagcfg    diagcfg_cmd          g            i          3 =          Q           l                                                   diagcfg_param                                                         :           N          c                         2                                                              1            G            `          z                       AUDIO_ISLAND_TCM_PHYSPOOL           QSH_ISLAND_POOL             __symbols__         /soc            /sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg base_port num_ports test_config test_bool1 test_bool2 test_ver test_uint8_list test_uint16 test_uint32 test_uint32_list test_uint64 test_string test_uint8 test_uint8_list_empty test_uint16_list test_uint16_list_empty test_uint32_list_empty test_uint64_list test_uint64_list_empty reg_alt reg-names PD_indicator test_oem_entry service_id instance_id qdss_service_id image_id eic_crash_enable eic_crash_type eic_crash_delay image_idx QDI_QDSP_PM_USER_ID diag_test_cmd_f diag_v2_test_cmd_f diag_legacy_health_count_base diag_ulogdiag_processor_id diag_subsys_id_base diag_lsm_cmd_reg_test_base diag_get_set_drain_param diag_f3_trace_set_config diag_health_stats_base diag_err_ulog_size diag_debug_ulog_size diag_qdss_ulog_size diag_logtracker_ulog_size diag_dsqb_ulog_size diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_event_send_max diag_multipd_buf_size diag_multipd_event_heap_size diag_send_buf_size_data_userpd diag_lsm_stack_size diag_stress_task_sleep_complete diag_deferrable_timer diag_deferrable_timer_ex diag_msg_fmt_str_arg_size diag_uimage_mpd_buf_size diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool soc sw    h   8     (                                               qcom,glymur          qcom,glymur                             board-id             ,qsh_process-glymur-1.0-adsp          6            soc                                   @      cxstmtrace@16000000          qcom,stmtrace            H               L  @         V   @      lpistmtrace@7100000          qcom,stmtrace            H              L  @         V   @         sw           @      core       cpt_boot_test      PD_Access_control            `  X      OEM_Flavor_Validation            m            mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config          |               "               debugtrace           qcom,debugtrace                   debugtools     tms_diag             qcom,tms_diag                     eic       	   qcom,eic                                          Z      version_tbl          qcom,image_version_tbl_idx                       power      qdsp_pm    pd           qcom,pd-qsh-process                         products       sdcloader            qcom,sdcloader     sdc_params             <                               !           /          =           Ka        sdc_physpool            U           k           'P                           diag             qcom,sensor_user_diagcfg       diagcfg_cmd          h           j           =                                          6          O          h'        diagcfg_param                                                                                                   2   2        F           \           y                                                                             .            LQSH_ISLAND_POOL         ]QSH_ISLAND_POOL          qup_user_pd_feature          qcom,sw-qup-user-pd-controller          s            __symbols__         /soc            /sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg base_port num_ports PD_indicator test_oem_entry service_id instance_id qdss_service_id image_id eic_crash_enable eic_crash_type eic_crash_delay image_idx QDI_QDSP_PM_USER_ID wdog_irq_num err_irq_num code_ram_addr data_ram_addr code_ram_size data_ram_size pram_addr ssc_sdc_physpool_addr ssc_sdc_physpool_size ipcmem_physpool_addr ipcmem_physpool_size diag_test_cmd_f diag_v2_test_cmd_f diag_legacy_health_count_base diag_ulogdiag_processor_id diag_subsys_id_base diag_lsm_cmd_reg_test_base diag_get_set_drain_param diag_f3_trace_set_config diag_health_stats_base diag_err_ulog_size diag_debug_ulog_size diag_qdss_ulog_size diag_logtracker_ulog_size diag_dsqb_ulog_size diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_event_send_max diag_multipd_buf_size diag_multipd_event_heap_size diag_send_buf_size_data_userpd diag_lsm_stack_size diag_stress_task_sleep_complete diag_deferrable_timer diag_deferrable_timer_ex diag_msg_fmt_str_arg_size diag_uimage_mpd_buf_size diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool user_pd_island_enabled soc sw     P   8 e    (            0, d                                 qcom,mahua           qcom,mahua                              board-id             ,default_process-mahua-1.0-adsp           6            soc                                   @      ipcc                                   
   qcom,ipcc      ipcc@3e02000             qcom,ipcc-protocol           H              L            SMPROC            a             n               y                  D                      !   "   :   ;   <   -   .   7   8                  @         ipcc@3e40000             qcom,ipcc-protocol           H              L            SCOMPUTE_L0           a            n               N                   0               	   !   "   
            -   .         @         ipcc@3e80000             qcom,ipcc-protocol           H              L            SCOMPUTE_L1           a            n                                  0               	   !   "   
            -   .         @         ipcc@3ec0000             qcom,ipcc-protocol           H              L            SPERIPH           a            n                                  D                  !   "                  ,   -   .   7   8            @            ipcc_legacy@6888004          H              @      ipcc_legacy_sdc          qcom,ipcc-legacy                        L            n              8  9  :  ;                     @          timetick                                 timer@68a2000            qcom,timetick            H           SystemTimer          $                                  @         timer@68a3000            qcom,timetick            H0          WakeUpTimer          $                                  @            pinctrl@f100000       !   qcom,glymur-pinctrl qcom,pinctrl             H                                                                                            n               >   O   V      B   u           $   }                         P  4summary directconn0 directconn1 directconn2 directconn3 directconn4 directconn5         D           WGPIOINTADSP          @      qup0_se0_l0         h                @         qup0_se0_l1         h               @         qup0_se0_l2         h               @         qup0_se0_l3         h               @         qup0_se1_l0         h               @         qup0_se1_l1         h               @         qup0_se1_l2         h               @         qup0_se1_l3         h               @         qup0_se2_l0         h               @         qup0_se2_l1         h   	            @         qup0_se2_l2         h   
            @         qup0_se2_l3         h               @         qup0_se2_l4         h               @         qup0_se2_l5         h               @         qup0_se2_l6         h               @         qup0_se3_l0         h               @         qup0_se3_l1         h               @         qup0_se3_l2         h               @         qup0_se3_l3         h               @         qup0_se3_l4         h               @         qup0_se3_l5         h               @         qup0_se3_l6         h               @         qup0_se4_l0         h               @         qup0_se4_l1         h               @         qup0_se4_l2         h               @         qup0_se4_l3         h               @         qup0_se5_l0         h               @         qup0_se5_l1         h               @         qup0_se5_l2         h               @         qup0_se5_l3         h               @         qup0_se6_l0         h               @         qup0_se6_l1         h               @         qup0_se6_l2         h               @         qup0_se6_l3         h               @         qup0_se7_l0         h               @         qup0_se7_l1         h               @         qup0_se7_l2         h               @         qup0_se7_l3         h               @         qup1_se0_l0         h                @         qup1_se0_l1         h   !            @         qup1_se0_l2         h   "            @         qup1_se0_l3         h   #            @         qup1_se1_l0         h   $            @         qup1_se1_l1         h   %            @         qup1_se1_l2         h   &            @         qup1_se1_l3         h   '            @         qup1_se2_l0         h   (            @         qup1_se2_l1         h   )            @         qup1_se2_l2         h   *            @         qup1_se2_l3         h   +            @         qup1_se2_l4         h   1            @         qup1_se2_l5         h   2            @         qup1_se2_l6         h   3            @         qup1_se3_l0         h   ,            @         qup1_se3_l1         h   -            @         qup1_se3_l2         h   .            @         qup1_se3_l3         h   /            @         qup1_se3_l4         h   !            @         qup1_se3_l5         h   "            @         qup1_se3_l6         h   #            @         qup1_se4_l0         h   0            @         qup1_se4_l1         h   1            @         qup1_se4_l2         h   2            @         qup1_se4_l3         h   3            @         qup1_se5_l0         h   4            @         qup1_se5_l1         h   5            @         qup1_se5_l2         h   6            @         qup1_se5_l3         h   7            @         qup1_se6_l0         h   8            @         qup1_se6_l1         h   9            @         qup1_se6_l2         h   :            @         qup1_se6_l3         h   ;            @         qup1_se7_l0         h   6            @         qup1_se7_l1         h   7            @         qup1_se7_l2         h   4            @         qup1_se7_l3         h   5            @         qup2_se0_l0         h   @            @         qup2_se0_l1         h   A            @         qup2_se0_l2         h   B            @         qup2_se0_l3         h   C            @         qup2_se1_l0         h   D            @         qup2_se1_l1         h   E            @         qup2_se1_l2         h   F            @         qup2_se1_l3         h   G            @         qup2_se2_l0         h   H            @         qup2_se2_l1         h   I            @         qup2_se2_l2         h   J            @         qup2_se2_l3         h   K            @         qup2_se2_l4         h   Q            @         qup2_se2_l5         h   R            @         qup2_se2_l6         h   S            @         qup2_se3_l0         h   L            @         qup2_se3_l1         h   M            @         qup2_se3_l2         h   N            @         qup2_se3_l3         h   O            @         qup2_se3_l4         h   A            @         qup2_se3_l5         h   B            @         qup2_se3_l6         h   C            @         qup2_se4_l0         h   P            @         qup2_se4_l1         h   Q            @         qup2_se4_l2         h   R            @         qup2_se4_l3         h   S            @         qup2_se5_l0         h   T            @         qup2_se5_l1         h   U            @         qup2_se5_l2         h   V            @         qup2_se5_l3         h   W            @         qup2_se6_l0         h   X            @         qup2_se6_l1         h   Y            @         qup2_se6_l2         h   Z            @         qup2_se6_l3         h   [            @         qup2_se7_l0         h   P            @         qup2_se7_l1         h   Q            @         qup2_se7_l2         h   R            @         qup2_se7_l3         h   S            @        qup3_se0_l0         h               @        qup3_se0_l1         h               @        qup3_se0_l2         h               @        qup3_se0_l3         h               @        qup3_se0_l4         h               @        qup3_se0_l5         h               @        qup3_se0_l6         h               @        qup3_se0_l7         h               @  	      qup3_se1_l0         h   (            @  
      qup3_se1_l1         h   )            @        qup3_se1_l2         h   *            @        qup3_se1_l3         h   +            @        qup3_se1_l4         h   1            @        qup3_se1_l5         h   2            @        qup3_se1_l6         h   3            @        qup3_se1_l7         h   0            @           pinctrl@7760000       !   qcom,glymur-pinctrl qcom,pinctrl             Hv                                                  l                          l  z   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E         @     slimbus_clk         h               @         slimbus_data            h               @         slimbus_default_gpio_cfg                 !    !         @            pinctrl@75C0000       !   qcom,glymur-pinctrl qcom,pinctrl             H\                 -                                                              z  a  a   E   E  Q  Q   E   E  a  a   E   E   E   E  I  E  Q  Q   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E   E  Q  Q   E   E   E   E   E         @     ssc_gpio_10_clk         h   
            @        ssc_gpio_11_clk         h               @        ssc_gpio_12_clk         h               @        ssc_gpio_13_clk         h               @        ssc_gpio_18_clk         h               @        ssc_gpio_19_clk         h               @        ssc_gpio_24_clk         h               @        ssc_gpio_25_clk         h               @        ssc_gpio_26_clk_reserved            h               @        ssc_gpio_27_clk_reserved            h               @        ssc_gpio_28_clk_reserved            h               @        ssc_gpio_29_clk_reserved            h               @        ssc_gpio_30_clk_reserved            h               @         ssc_gpio_31_clk_reserved            h               @  !      ssc_gpio_34_clk_reserved            h   "            @  "      ssc_gpio_35_clk_reserved            h   #            @  #      ssc_gpio_6_clk          h               @  $      ssc_gpio_7_clk          h               @  %      ssc_qupv3_se0_0         h                @         ssc_qupv3_se0_1         h               @         ssc_qupv3_se10_0            h               @          ssc_qupv3_se10_1            h               @   !      ssc_qupv3_se10_2            h               @   "      ssc_qupv3_se10_3            h               @   #      ssc_qupv3_se11_0_reserved           h               @  &      ssc_qupv3_se11_1_reserved           h               @  '      ssc_qupv3_se11_2_reserved           h               @  (      ssc_qupv3_se11_3_reserved           h               @  )      ssc_qupv3_se12_0_reserved           h               @  *      ssc_qupv3_se12_1_reserved           h               @  +      ssc_qupv3_se13_0_reserved           h                @  ,      ssc_qupv3_se13_1_reserved           h   !            @  -      ssc_qupv3_se13_2_reserved           h   "            @  .      ssc_qupv3_se13_3_reserved           h   #            @  /      ssc_qupv3_se14_0_reserved           h   $            @  0      ssc_qupv3_se14_1_reserved           h   %            @  1      ssc_qupv3_se1_0         h               @         ssc_qupv3_se1_1         h               @         ssc_qupv3_se1_2_reserved            h               @  2      ssc_qupv3_se1_3_reserved            h               @  3      ssc_qupv3_se2_0         h               @         ssc_qupv3_se2_1         h               @   	      ssc_qupv3_se2_2         h               @   
      ssc_qupv3_se2_3         h               @         ssc_qupv3_se2_4         h               @  4      ssc_qupv3_se2_5         h   	            @  5      ssc_qupv3_se3_0         h               @         ssc_qupv3_se3_1         h   	            @         ssc_qupv3_se4_0         h   
            @         ssc_qupv3_se4_1         h               @         ssc_qupv3_se4_2         h               @         ssc_qupv3_se4_3         h               @         ssc_qupv3_se4_4         h               @  6      ssc_qupv3_se4_5         h               @  7      ssc_qupv3_se5_0         h               @         ssc_qupv3_se5_1         h               @         ssc_qupv3_se5_2         h               @         ssc_qupv3_se5_3         h               @         ssc_qupv3_se6_0         h               @         ssc_qupv3_se6_1         h               @         ssc_qupv3_se6_2         h               @         ssc_qupv3_se6_3         h               @         ssc_qupv3_se7_0         h               @         ssc_qupv3_se7_1         h               @         ssc_qupv3_se7_2         h               @         ssc_qupv3_se7_3         h               @         ssc_qupv3_se8_0         h               @         ssc_qupv3_se8_1         h               @         ssc_qupv3_se9_0_reserved            h               @  8      ssc_qupv3_se9_1_reserved            h               @  9      qup_ssc0_se0_i2c_active                          @   =      qup_ssc0_se0_i2c_sleep                           @   >      qup_ssc0_se0_i3c_active              
     
         @   ?      qup_ssc0_se0_i3c_sleep               !     !         @   @      qup_ssc0_se0_i3c_ibi_active              
     
         @   A      qup_ssc0_se0_i3c_ibi_sleep               !     !         @   B      qup_ssc0_se1_i2c_active                          @   C      qup_ssc0_se1_i2c_sleep                           @   D      qup_ssc0_se1_i3c_active              
     
         @   E      qup_ssc0_se1_i3c_sleep               !     !         @   F      qup_ssc0_se1_i3c_ibi_active              
     
         @   G      qup_ssc0_se1_i3c_ibi_sleep               !     !         @   H      qup_ssc0_se2_i2c_active                	          @   I      qup_ssc0_se2_i2c_sleep                 	          @   J      qup_ssc0_se2_i3c_active              
   	  
         @   K      qup_ssc0_se2_i3c_sleep               !   	  !         @   L      qup_ssc0_se2_i3c_ibi_active              
   	  
         @   M      qup_ssc0_se2_i3c_ibi_sleep               !   	  !         @   N      qup_ssc0_se2_spi_active             X    	X    
X    X          @   O      qup_ssc0_se2_spi_sleep                !   	  !   
  !     !         @   P      qup_ssc0_se2_uart_active                     	     
                @   Q      qup_ssc0_se2_uart_sleep                  	     
                @   R      qup_ssc0_se3_i2c_active                          @   S      qup_ssc0_se3_i2c_sleep                           @   T      qup_ssc0_se3_i3c_active              
     
         @   U      qup_ssc0_se3_i3c_sleep               !     !         @   V      qup_ssc0_se3_i3c_ibi_active              
     
         @   W      qup_ssc0_se3_i3c_ibi_sleep               !     !         @   X      qup_ssc0_se4_i2c_active                          @   Y      qup_ssc0_se4_i2c_sleep                           @   Z      qup_ssc0_se4_spi_active             X    X    X    X          @   [      qup_ssc0_se4_spi_sleep                !     !     !     !         @   \      qup_ssc0_se4_uart_active                                          @   ]      qup_ssc0_se4_uart_sleep                                       @   ^      qup_ssc0_se5_i2c_active                          @   _      qup_ssc0_se5_i2c_sleep                           @   `      qup_ssc0_se5_i3c_active              
     
         @   a      qup_ssc0_se5_i3c_sleep               !     !         @   b      qup_ssc0_se5_i3c_ibi_active              
     
         @   c      qup_ssc0_se5_i3c_ibi_sleep               !     !         @   d      qup_ssc0_se5_spi_active             X    X    X    X          @   e      qup_ssc0_se5_spi_sleep                !     !     !     !         @   f      qup_ssc0_se5_uart_active                                          @   g      qup_ssc0_se5_uart_sleep                                       @   h      qup_ssc0_se6_i2c_active                          @   i      qup_ssc0_se6_i2c_sleep                           @   j      qup_ssc0_se6_i3c_active              
     
         @   k      qup_ssc0_se6_i3c_sleep               !     !         @   l      qup_ssc0_se6_i3c_ibi_active              
     
         @   m      qup_ssc0_se6_i3c_ibi_sleep               !     !         @   n      qup_ssc0_se6_spi_active             X    X    X    X          @   o      qup_ssc0_se6_spi_sleep                !     !     !     !         @   p      qup_ssc0_se6_uart_active                                          @   q      qup_ssc0_se6_uart_sleep                                       @   r      qup_ssc0_se7_i2c_active                          @   s      qup_ssc0_se7_i2c_sleep                           @   t      qup_ssc0_se7_spi_active             X    X    X    X          @   u      qup_ssc0_se7_spi_sleep                !     !     !     !         @   v      qup_ssc0_se7_uart_active                                          @   w      qup_ssc0_se7_uart_sleep                                       @   x      qup_ssc0_se8_i2c_active                          @   y      qup_ssc0_se8_i2c_sleep                           @   z      qup_ssc0_se8_i3c_active              
     
         @   {      qup_ssc0_se8_i3c_sleep               !     !         @   |      qup_ssc0_se8_i3c_ibi_active              
     
         @   }      qup_ssc0_se8_i3c_ibi_sleep               !     !         @   ~      qup_ssc0_se10_i2c_active                    !          @         qup_ssc0_se10_i2c_sleep                 !          @         qup_ssc0_se10_spi_active                 X    !X    "X    #X          @         qup_ssc0_se10_spi_sleep                !   !  !   "  !   #  !         @         qup_ssc0_se10_uart_active                     !     "     #           @         qup_ssc0_se10_uart_sleep                      !     "     #           @            vdd_mxa          qcom,rpmh-arc-regulator         /vcs/vdd_mxa /vcs/vdd_mx                                             mx.lvl                                             @  :      vdd_mxc          qcom,rpmh-arc-regulator         /vcs/vdd_mxc                                             mxc.lvl                                            @  ;      vdd_cx           qcom,rpmh-arc-regulator         /vcs/vdd_cx                                          cx.lvl                                             @  <      vdd_lpi_mx           qcom,rpmh-arc-regulator          /vcs/vdd_lpi_mx /vcs/vdd_ssc_mx                                          lmx.lvl                               ?         @  =      vdd_lpi_cx           qcom,rpmh-arc-regulator       !  /vcs/vdd_lpi_cx /vcs/vdd_ssc_int                                             lcx.lvl                               ?         @  >      clock-controller@100000          qcom,gcc-glymur qcom,cc-glymur           H                  0     @     P     `     p                                                              0     @                     /      /            )GCC_GPLL0_CM_PLL_TAYCAN_COMMON GCC_GPLL1_CM_PLL_TAYCAN_COMMON GCC_GPLL2_CM_PLL_TAYCAN_COMMON GCC_GPLL3_CM_PLL_TAYCAN_COMMON GCC_GPLL4_CM_PLL_TAYCAN_COMMON GCC_GPLL5_CM_PLL_TAYCAN_COMMON GCC_GPLL6_CM_PLL_TAYCAN_COMMON GCC_GPLL7_CM_PLL_TAYCAN_COMMON GCC_GPLL8_CM_PLL_TAYCAN_COMMON GCC_GPLL9_CM_PLL_TAYCAN_COMMON GCC_GPLL10_CM_PLL_ZONDA_COMMON GCC_GPLL11_CM_PLL_ZONDA_COMMON GCC_GPLL12_CM_PLL_ZONDA_COMMON GCC_GPLL13_CM_PLL_ZONDA_COMMON GCC_GPLL14_CM_PLL_TAYCAN_COMMON GCC_GPLL15_CM_PLL_TAYCAN_COMMON GCC_GPLL16_CM_PLL_TAYCAN_COMMON GCC_GPLL17_CM_PLL_TAYCAN_COMMON GCC_GPLL18_CM_PLL_TAYCAN_COMMON GCC_GPLL19_CM_PLL_TAYCAN_COMMON GCC_JBIST_CM_PLL_JBIST4_COMMON GCC_AHB2PHY_SWMAN GCC_AHB2PHY_BROADCAST_SWMAN GCC_CLK_CTL_REG GCC_RPU_RPUQ11_512_CL36L12_LE GCC_RPU_XPU4           3            @  ?      clock-controller@1f40000          (   qcom,lpass_aon_cc-glymur qcom,cc-glymur       P   H                              `    p        &         <  )TCSR_TCSR_REGS LPASS_QDSP6SS_QDSP6SS_PUB LPASS_QDSP6SS_QDSP6SS_QDSP6SSV81_CORE_CC_SWI LPASS_QDSP6SS_PLL_PLL_CM_PLL_TAYCAN_COMMON LPASS_QDSP6SS_QDSP6SSV81_CORE_CC_REG LPASS_AON_CC_PLL_CM_PLL_TAYCAN_COMMON LPASS_AON_CC_AHB2PHY_SWMAN LPASS_AON_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_CC_LPASS_AON_CC_REG LPASS_LPI_TCM_REG         3            @   ;      clock-controller@7700000          +   qcom,lpass_aon_mx_cc-glymur qcom,cc-glymur            Hp     p`    pp    p            )LPASS_AON_MX_CC_RO_PLL_CM_PLL_PONGO_COMMON LPASS_AON_MX_CC_AHB2PHY_SWMAN LPASS_AON_MX_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_MX_CC_LPASS_AON_MX_CC_REG            3            @  @      clock-controller@6bc0000          *   qcom,lpass_audio_cc-glymur qcom,cc-glymur         0   H              `    p                )LPASS_AUDIO_CC_PLL_CM_PLL_ZONDA_COMMON LPASS_AUDIO_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_AUDIO_CC_LCC_PLL_CM_PLL_JBIST4_COMMON LPASS_AUDIO_CC_AHB2PHY_SWMAN LPASS_AUDIO_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AUDIO_CC_LPASS_AUDIO_CC_REG            3            @  A      clock-controller@7b00000          )   qcom,lpass_core_cc-glymur qcom,cc-glymur          0   H     `    p            0             )LPASS_LPASS_CORE_CC_DIG_PLL_LPASS_CORE_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_LPASS_CORE_CC_REG LPASS_HW_AF_CORE LPASS_CORE_GDSC           3            @  B      clock-controller@6e40000          *   qcom,lpass_lpmla_cc-glymur qcom,cc-glymur             H     `    p       @         )LPASS_LPMLA_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPMLA_CC_AHB2PHY_SWMAN LPASS_LPMLA_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPMLA_CC_LPASS_LPMLA_CC_REG           3            @  C      clock-controller@7a00000             qcom,scc-glymur qcom,cc-glymur           H             )SSC_SCC_SCC_SCC_REG         3            @   <      cesta@7213000         '   qcom,lpass_cesta-glymur qcom,cc-glymur        (   H!0    !4    !8     !X    !_          @  )LPASS_CRMB LPASS_CRMB_PT LPASS_CRMC LPASS_CRMV LPASS_CRM_COMMON          @  D      glink            qcom,glink           @                                  proc-info           P                     xport-smem-config      edge-01         U                        a  @         k           t                   |  N          xport-qmp-config       edge-01       	  aop_adsp            U                                                         t                                  @             ipc_router           qcom,ipc_router    proc-info           adsp                                  devcfg-glink-xals      edge-01         SMEM            apss            IPCRTR                       (           1            <                                   smp2p            qcom,smp2p     proc-info           D                       L           S         smp2p-interrupts       intr-01         _                        R           d         intr-02         _                       R           d               smem          
   qcom,smem           hCORE_TOP_CSR            y                       0                          @  @      cxstmtrace@16000000          qcom,stmtrace            H                                  lpistmtrace@7100000          qcom,stmtrace            H                           @      cxstmcfg@10002000            qcom,stmcfg          H                                 lpistmcfg@11c43000           qcom,stmcfg          H0                               cxetb@11c05000        	   qcom,tmc             HP          lpietb@11c45000       	   qcom,tmc             HP          tpdm@11c46000         
   qcom,tpdm            H`            tpdm_31            $                             tpdm@11c52000         
   qcom,tpdm            H             tpdm_62            %                                        tpdm@11c54000         
   qcom,tpdm            H@            tpdm_22            &                             tpdm@11c34000         
   qcom,tpdm            H@            tpdm_50            '                            tpdm@11c3c000         
   qcom,tpdm            H            tpdm_8             (                            qdss                                 0         L       L      !_!_                     &   )        1           A   )      tpath_lpass_lpi_dl_tpda         j   *      +      )            @   7      tpath_lpass_lpi_crm_dl_tpda         j   *      +      )            @   8      tpath_lpass_lpi_audio_hm_dl_tpda            j   *      +      )            @   9      tpath_lpi_stm           j   *       +      )            @   -      tpath_lpi_etm           j   +       )      +            @   .      tpath_sdc_etm           j   +      )            @   /      tpath_stm           j   ,      )            @   0      tpath_sdc_itm           j   +      )            @   1      tpath_lpass_lpi_noc         j   +      )            @   2      tpath_lpi_aon_noc           j   +      )            @   3      tpath_aoc           j   +      )            @   4      tpath_enpu0_noc         j   *      +      )            @   5      tpath_enpu1_noc         j   *      +      )            @   6         cti@11c35000          	   qcom,cti          (  pddrss_lpi_slice0cti_cti_qc_cti_extended          HP          cti@11c42000          	   qcom,cti          $  plpass_lpi_cti_sdc_2_cti_sdc_2_cscti          H           cti@11c4b000          	   qcom,cti          &  plpass_lpi_qdsp6_qdsp6ss_qdsp6ss_cscti            Hİ          cti@11c51000          	   qcom,cti          "  plpass_lpi_cti_3_cti_3_qc_cti_core            H          cti@11c41000          	   qcom,cti          "  plpass_lpi_cti_1_cti_1_qc_cti_core            H          cti@11c3d000          	   qcom,cti          (  pddrss_lpi_slice1cti_cti_qc_cti_extended          H          qdss_lpi_csr@6ee0000             qcom,qdss_lpi_csr            H           funnel@10041000          qcom,tfunnel             H             @   ,      funnel@11c44000          qcom,tfunnel             H@             @   +      funnel@11c50000          qcom,tfunnel             H              @   *      funnel@11c04000          qcom,tfunnel             H@             @   )      tnoc@11c31000         
   qcom,tnoc           y   '         H               *                )  port_ddrss_lpi_slice0ddrss_lpi_trace_noc             @   '      tnoc@11c39000         
   qcom,tnoc           y   (         HÐ               9                )  port_ddrss_lpi_slice0ddrss_lpi_trace_noc             @   (      port_lpi_stm          	   qcom,gts                        j   -      port_lpi_etm          	   qcom,gts                       j   .      port_sdc_etm          	   qcom,gts                       j   /      port_stm          	   qcom,gts                        j   0      port_sdc_itm          	   qcom,gts               	        j   1      port_lpass_lpi_noc        	   qcom,gts                       j   2      port_lpi_aon_noc          	   qcom,gts                       j   3      port_aoc          	   qcom,gts               
        j   4      port_enpu0_noc        	   qcom,gts                       j   5      port_enpu1_noc        	   qcom,gts                       j   6      tpda@11c47000         
   qcom,tpda            Hp            tpda_26                               j   7         @   $      tpda@11c53000         
   qcom,tpda            H0            tpda_55            7                   j   8         @   %      tpda@11c55000         
   qcom,tpda            HP            tpda_56            8                   j   9         @   &      systemcache@20400000             qcom,systemcache          X   H @      `     !     !     !     !     "     "     "     "      (             )llcc_bcast_or_base llcc_bcast_and_base llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base ddrss_regs_base                      @                                @         llc-island           qcom,llc-island    islands                                        island@c,80000000            H       X                         subsys_instance          qcom,subsys_instance                      spmi-bus@c400000             qcom,spmi-pmic-arb           H@                                        @  E   pmic@0           qcom,spmi-pmic           H                                                           @  F   spmi-vadc@92             qcom,spmi-vadc           H                                                           "            &   :   vadc_ch_cfg    VPH_PWR         0VPH_PWR         6           <            F            M           W           b                           j            t            |            vadc-avg-ch       gpio-map          therm_table          @   :   therm_tb1                       @x    -     $        R    Ȩ   	   (l   m   %   1   z      %   * 5`  /    4    9    >    C  i  H  V  M  G|  R  ;`  W  18  \  )h  a  "  f  L  k    p  "  u    z      \        
            vadctm_meas_cfg                  VPH_PWR         0VPH_PWR         6                           b                           j            |                 '                  spmi-bus@c436000             qcom,spmi-pmic-arb           H@                                        @  G      spmi-bus@c447000             qcom,spmi-pmic-arb           H@             "                                      @  H      ssc_qup_fw_cfg           qcom,qupfw-controller                 ssc_qup_0      se0_cfg                     P                                                                                     se1_cfg           @         Q                                                                                     se2_cfg                    R                                                                                     se3_cfg                    S                                                                                     se4_cfg           	                                                                                                 se5_cfg           	@         T                                                                                      se6_cfg           	         U                                                                                     se7_cfg           	                                                                                                 se8_cfg           
          V                                                                                     se10_cfg              
                                                                                                      ibi_ssc_0_cfg@7500000            qcom,ibi-controller          HP                                                  M            $            )   G        2   !        :ok           @  I      ibi_ssc_1_cfg@7510000            qcom,ibi-controller          HQ                                                 M            $            )   f        2           :ok           @  J      ibi_ssc_2_cfg@7520000            qcom,ibi-controller          HR                                                 M            $            )           2           :ok           @  K      ibi_ssc_3_cfg@7530000            qcom,ibi-controller          HS                                                 M            $            )          2          :ok           @  L      ibi_ssc_4_cfg@7540000            qcom,ibi-controller          HT                                                 M            $            )          2          :ok           @  M      ibi_ssc_5_cfg@7550000            qcom,ibi-controller          HU                                                 M            $            )          2          :ok           @  N      ibi_ssc_6_cfg@7560000            qcom,ibi-controller          HV                                                 M            $            )          2          :ok           @  O      ssc_pwr_domains          qcom,ssc-pwr-domain-controller        	  Assc_gdsc            M   ;@H      SSC_QUP_0@7900000            qcom,sscqup-controller           H             Acore2x core s-ahb m-ahb          M   <Sd   <d4   <v   <^,        T           [           m           р                   	                      :ok     SSC_QUP_0_SE_0           qcom,se-controller                                                                     ޘ                                                      $+          -           5           H           R          _          s            Ase-clk          M   <H      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              =           >           ?           @           A           B        :ok        SSC_QUP_0_SE_1           qcom,se-controller            @                                                      ޘ                                                     $,          -   p        5           H           R          _          s            Ase-clk          M   < Ǟ      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              C           D           E           F           G           H        :ok        SSC_QUP_0_SE_2           qcom,se-controller                                                                  ޞ                                                     $-          -            5            H           R          _          s            Ase-clk          M   <~E:      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            I           J           K           L           M           N           O           P           Q           R        :ok        SSC_QUP_0_SE_3           qcom,se-controller                                                                  ޘ                                                     $.          -            5            H           R          _          s            Ase-clk          M   <w      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              S           T           U           V           W           X        :ok        SSC_QUP_0_SE_4           qcom,se-controller                                                                                                                        $/          -            5            H            R          _          s            Ase-clk          M   <*̉      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep            Y           Z           [           \           ]           ^        :ok        SSC_QUP_0_SE_5           qcom,se-controller           @                                                      ޞ                                                     $0          -   w        5           H            R          _          s            Ase-clk          M   <      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            _           `           a           b           c           d           e           f           g           h        :ok        SSC_QUP_0_SE_6           qcom,se-controller                                                                 ޞ                                                     $1          -           5           H           R          _          s            Ase-clk          M   <      x  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep spi-default spi-sleep uart-default uart-sleep            i           j           k           l           m           n           o           p           q           r        :ok        SSC_QUP_0_SE_7           qcom,se-controller                                                                                                                       $*          -            5            H            R          _          s            Ase-clk          M   <O      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep            s           t           u           v           w           x        :ok        SSC_QUP_0_SE_8           qcom,se-controller                                                                  ޘ                                                     $)          -            5            H            R          _          s            Ase-clk          M   <pP      J  i2c-default i2c-sleep i3c-default i3c-sleep i3c_ibi-default i3c_ibi-sleep              y           z           {           |           }           ~        :ok        SSC_QUP_0_SE_10          qcom,se-controller                                           
                                             	                               $          -           5           H            R          _          s            Ase-clk          M   <      D  i2c-default i2c-sleep spi-default spi-sleep uart-default uart-sleep                                                                           :ok           qup_tcsr_info            qcom,quptcsr-controller               tcsr_cfg0              k           
                               (              tcsr_cfg1                         
                               (                 gsi_info             qcom,gsi-controller    gsi_qup_0           1 @         8T        B           S   Z      @  \                                                                        l            u                     gsi_qup_1           1 @         8h        B           S   [      @  \                                                                        l           u                    gsi_qup_2           1 @         8        B           S   d      @  \                                                                        l           u                    gsi_qup_3           1 @         8p        B           S   j      @  \                                                                        l           u                    gsi_ssc_qup_0           1@         8            B            S          @  \                   !  "  #  $  %  &  '  (        l           u                       SlimbusBSP           qcom,smbus-controller           |           SLIMBUS           0          LPASS                                @                                            2         B        slimbus-default                               	                	                   	!         sb_0_DeviceProps            	,           	/  0          	4         sb_1_DeviceProps            	,           	/ 0          	4         sb_2_DeviceProps            	,           	/ 0          	4         sb_3_DeviceProps            	,           	/ 0          	4         sb_4_DeviceProps            	,           	/ 0          	4         sb_5_DeviceProps            	,           	/             	4         sb_6_DeviceProps            	,           	/            	4         slimbus_gen_config_1            	B           	SLPASS           	a/vcs/vdd_lpi_cx         	m           	w   	        	            	            	           	w0         	w@         	           	           	svs_npa_str         	            
           
           
"           
2            
B           
U           
i           
|           
         
           
           
                              sbMmpmRegParam          !           %   j        4           Kslimbus         W            c            p            ~          sbLpmMmpmRegParam           !           %   {        4           Kslimbus         W            c            p            ~          kernel_test_devices@0                                     H                 n      interrupt-controller@10140000            test,interrupt-control           H                                              @         device1@f101000          qcom,test,singleton          Device region mapping with name          H             device1         )test_reg_singleton              ]           4int1          device2@1011000          qcom,test,singleton       !  Device region mapping with index             device2          H                ^           4int2          device3@0            qcom,test,singleton         Device with no region mapping            device3          H                   _           4int3          device4@1            qcom,test,not_compatible            Device not compatible            device4          H                         `         
  4zero int4         device5@1010000          qcom,test,non_singleton          Device region mapping with name          H              device5         )test_reg_non_singleton              sw           @  P   core       boot                              mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config                                       debugtrace           qcom,debugtrace                  debugtools     version_tbl          qcom,image_version_tbl_idx                   eic       	   qcom,eic                                       Z      err_qdi          qcom,err_qdi              P        1           G   
      pd_mon     audio_process             qcom,pd_mon_user_process_config         T/ramfs/audio_lpai.mbn         3  i/rfs/root/vendor/firmware_mnt/image/audio_lpai.mbn          audio_process                                	  audio_pd          charger_process           qcom,pd_mon_user_process_config         T            i            charger_process                                charger_pd        qsh_process           qcom,pd_mon_user_process_config         T/ramfs/qsh.mbn        ,  i/rfs/root/vendor/firmware_mnt/image/qsh.mbn         qsh_process                              
  sensor_pd         ois_process           qcom,pd_mon_user_process_config         T/ramfs/ois_lpai.mbn       ,  i/rfs/root/vendor/firmware_mnt/image/ois.mbn         ois_process                                ois_pd        pd_mon_restart           qcom,pd_mon_restart                                  rcinit           qcom,rcinit_cfg    rcinit_config_spinor                          d          u0        4           P           l                                                                rcinit_config                         !4                  4           P           l                                                                   tms_diag             qcom,tms_diag              0         products       pram_mgr             qcom,pram_mgr         	  SSC_PRAM       pram_partition     QMP         &QMP         f          SENSORS         &SENSORS         f         BUSES           &BUSES           f          GPI         &GPI         f  (       WIGIG           &WIGIG           f          BUSES_DEBUG         &BUSES_DEBUG         f         CAMERA_OIS          &CAMERA_OIS          f         SENSORS_OIS         &SENSORS_OIS         f               sdcloader            qcom,sdcloader     sdc_params          .  <        ;           G            U           c          q           a        sdc_physpool                                  'P                           systemcache          qcom,systemcache-sw                       @   clients    client-0                                client-1               -                 client-2               .                       llc-lpi-dump             qcom,llc-lpi-dump         J  QSH_ISLAND_POOL SSC_ISLAND_POOL QSHTECH_ISLAND_POOL CAM_LLCC_ISLAND1_POOL         diag             qcom,adsp_core_diagcfg     diagcfg_cmd                               8 *          R =          p U           Z                                                                )          >          ^          w                                                  "                              /          F          _          s                     !        diagcfg_param              @                                                     $           8           L           d                                                                                       2           G   2        [           p                         @                                                       	                       .           M   <        h                                                                 K           +           C           U          u                       d                                                         (            D            \          v                                                                                /  @         L   <        k            Z                       QURTOS_ISLAND_POOL          QURTOS_ISLAND_POOL        diagcfg_early_log                         _                             )                              diagcfg_f3_trace            A           W           q            qdsp_pm    config           qcom,config_data                                        lpassRegRange                                 f         l2ConfigRegRange                                    f          cores-array    core0              e                                           ?                 core1              f                                                       core2              g                                        "                 core3              h                                                           core4              i                                                           core5              j                      Z                                       core6              l                                        !                 core7              m                      U                                        core8              o                                          .                 core9              {                                        2                 core10             r                                          +                 core11             v                                          /                 core12             w                      _                                     core13             y                                           1                 core14             z                                         0                 core15             |           	           p   q                         6   7                 core16                                   l                                     core17                                    o                                   core18                                    m                                     core19                                    n                    5                    memories-array     memory0         *                      memory1         *                       clocks-array       clock0          0           6           >         	  J/clk/cpu            R            [                      clock1          0           6           >           Jlpass_core_cc_core_clk          R            [                     clock2          0           6           >           Jlpass_audio_cc_bus_clk          R            [                     clock3          0           6           >           Jlpass_aon_cc_aon_h_clk          R            [                      clock4          0   6        6           >           Jlpass_aon_cc_lpi_noc_ls_clk         R            [                      clock5          0   7        6           >           Jlpass_aon_cc_lpi_noc_hs_clk         R            [                      clock6          0           6           >            Jlpass_audio_cc_slimbus_core_clk         R           [                     clock7          0           6           >           Jlpass_core_cc_lpm_core_clk          R            [                    clock8          0           6           >            Jlpass_core_cc_lpm_mem0_core_clk         R            [                    clock9          0           6           >           Jlpass_audio_cc_codec_mem_clk            R            [                     clock10         0           6           >           Jlpass_audio_cc_codec_mem0_clk           R            [                     clock11         0           6           >           Jlpass_audio_cc_codec_mem1_clk           R            [                     clock12         0           6           >           Jlpass_audio_cc_codec_mem2_clk           R            [                     clock13         0           6           >           Jlpass_audio_cc_codec_mem3_clk           R            [                     clock14         0           6           >           Jlpass_aon_mx_cc_va_mem0_clk         R            [                      clock15         0           6           >           Jlpass_aon_mx_cc_va_mem1_clk         R            [                      clock16         0           6           >         $  Jlpass_core_cc_sysnoc_mport_core_clk         R            [                     clock17         0           6           >           Jlpass_audio_cc_bus_timeout_clk          R            [                     clock18         0   C        6           >         (  Jlpass_aon_cc_lpass_0_lpmla_ahb_odsc_clk         R            [                      clock19         0   D        6           >         (  Jlpass_aon_cc_lpass_1_lpmla_ahb_odsc_clk         R            [                      clock20         0           6           >         #  Jlpass_core_cc_sysnoc_sway_core_clk          R            [                     clock21         0   ?        6           >           Jscc_ccd_ahb2ahb_m_clk           R            [                      clock22         0   @        6           >           Jscc_ccd_ahb2ahb_s_clk           R            [                      clock23         0   A        6           >           Jscc_ahb2ahb_s_clk           R            [                      clock24         0   B        6           >           Jlpass_aon_mx_cc_ibi_clk         R            [                      clock25         0   U        6           >           Jlpass_core_cc_resampler_clk         R            [                     clock26         0   Z        6           >           Jlpass_audio_cc_slimbus_clk          R            [                     clock27         0   \        6           >           Jlpass_core_cc_avsync_stc_clk            R            [                     clock28         0   ]        6           >           Jlpass_core_cc_avsync_atime_clk          R            [                     clock29         0   _        6           >           Jlpass_core_cc_hw_af_clk         R            [                     clock30         0   `        6           >           Jlpass_core_cc_hw_af_noc_clk         R            [                     clock31         0   p        6           >         !  Jlpass_lpmla_cc_lpass_0_lpmla_clk            R            [                      clock32         0   q        6           >         !  Jlpass_lpmla_cc_lpass_1_lpmla_clk            R            [                      clock33         0   v        6           >            Jlpass_aon_cc_enpu_scheduler_clk         R            [                      clock34         0   l        6           >           Jlpass_aon_cc_sdc_proc_fclk_clk          R            [                      clock35         0   o        6           >           Jscc_ccd_clk         R            [                      clock36         0   n        6           >           Jscc_smem_clk            R            [                         busport-array      busPort0            	            d            s             z                              busPort1            	           d      @        s            z                            busPort2            	   A        d   @        s            z                            busPort3            	   B        d   @        s            z                            busPort4            	   C        d   @        s            z                            busPort5            	   D        d   @        s            z                            busPort6            	   E        d   @        s            z                            busPort7            	           d           s            z                            busPort8            	           d           s            z                            busPort9            	           d           s            z                            busPort10           	           d           s            z                            busPort11           	           d   @        s            z                            busPort12           	           d           s            z                            busPort13           	           d           s            z                            busPort14           	           d   @        s   `         z                            busPort15           	           d           s            z                            busPort16           	           d   @        s            z          1                 busPort17           	           d   @        s            z          1                 busPort18           	           d           s            z                            busPort19           	           d           s            z                            busPort20           	           d           s            z                      $      busPort21           	           d           s            z                      $      busPort22           	           d           s            z                      $      busPort23           	            d           s            z                      $      busPort24           	   !        d           s            z                      $      busPort25           	   "        d           s            z                      $      busPort26           	   $        d           s            z                      $      busPort27           	   %        d           s            z                      $      busPort28           	   '        d           s            z           '           $      busPort29           	   (        d           s            z                       $      busPort30           	   +        d           s            z                      $      busPort31           	   1        d           s            z                      $      busPort32           	   0        d           s            z                      $      busPort33           	   .        d           s            z                      $      busPort34           	   2        d           s            z                      $      busPort35           	   /        d           s            z                      $      busPort36           	   6        d           s           z   C                      $      busPort37           	   7        d           s           z   D                      $      busPort38           	   5        d           s   n         z                      5      busPort39           	   ?        d           s            z                      ?         extroute-array     extBusRoute0                          %      extBusRoute1               A           (      extBusRoute2                          %      extBusRoute3               B           (      extBusRoute4                          %      extBusRoute5               C           (      extBusRoute6                          %      extBusRoute7               D           (      extBusRoute8                          %      extBusRoute9               E           (         mipsroute-array    mipsBwRoute0                          %      mipsBwRoute1               A           (         pwrDomain-array    pwrDomain0                     /core/cpu/latency                      0                                     pwrDomain1                   !  lpass_core_cc_lpass_core_hm_gdsc                       0                                     pwrDomain2                   !  lpass_aon_cc_lpass_audio_hm_gdsc                       0                                     pwrDomain3                                              0                                     pwrDomain4                     lpass_aon_cc_lpass_ssc_gdsc                     0                                        cestaBw-array      client0                                lpass      path0           *           8   5            cestaClk-array     clk0            0   l        Jlpass_aon_cc_sdc_proc_fclk_clk           cestaPwrDomain-array       pwrDomain0                     lpass_aon_cc_lpass_ssc_gdsc          features-array     feature0                       E              W            feature1                       E                W              feature2                       E                W              feature3                       E             W          feature4                       E                W              feature5                       E                W              feature6                       E                W              feature7                        E                W              feature8                       E               W          feature9                       E                W          feature10                      E    5         W          feature11                      E    /        W          feature12                      E                W              feature13                       E               W            feature14                       E    $=X         W          feature15                       E             W    	'       feature16                       E                W              feature17                      E                W              feature18                       E                W              feature19                       E                W              feature20                      E                W              feature21                      E                W              feature22                      E                W              feature23                      E                W              feature24                      E                W              feature25                       E                W              feature26                       E                W              feature27                      E                W              feature28                       E                W              feature29                      E                W          feature30                      E                W              feature31                      E                W              feature32                      E                W              feature33                      E                W              feature34                       E                W              feature35                      E                W              feature36                      E                W              feature37                       E                W                    config_arch          qcom,config_arch       compensatedDdrBwTable         0  I                rp                            0  P                                             0  W    ܓ                   X                     0  ^    t            2                            0  e     U            2                            0  l    &6                                       0  s    ,           s                            0  z    2                                        0      8ـ                                        0      >                                        0                                          adspsnocVoteTable         8  I                                   '             8  P                                    '             8  W    ܓ                   X      X      '             8  ^    t            2                   '             8  e     U           e                   '             8  l    &6           O                   '             8  s    ,                              '             8  z    2                              '             8      8ـ           U                   '             8      >           *                   '             8                                '             compensatedLecDdrBwTable          0  I                        X                     0  P                 2                            0  W                                            0  ^    ׄ            s                            0  e    e                                         0  l                                        adspLecsnocVoteTable          8  I                        X                             8  P                 2                                    8  W                O                                    8  ^    ׄ                                                8  e    e            U                                    8  l                                               compensatedMlDdrBwTable       0  I                 rp       X                     0  P    kI                                         0  W    Н             2                            0  ^   8                                        0  e   GW            s                            0  l   n!                                         0  s                                        adspMlsnocVoteTable       8  I                        X                             8  P    kI                                                 8  W    Н             2                                    8  ^   8            O                                    8  e   GW                                                8  l   n!            U                                    8  s                                               adspToLpiNocFreqTable           I0 $         P$  	'         W3 
v        ^=P 5          eM O         lbkP j        mlToLpiNocFreqTable         I$ $         PO 	'         WRH 
v        ^   5          e& O         l0 j                 __symbols__         /soc            /soc/ipcc/ipcc@3e02000          /soc/ipcc/ipcc@3e40000          /soc/ipcc/ipcc@3e80000          /soc/ipcc/ipcc@3ec0000          /soc/ipcc_legacy@6888004            /soc/timetick/timer@68a2000         /soc/timetick/timer@68a3000         /soc/pinctrl@f100000          !  /soc/pinctrl@f100000/qup0_se0_l0          !  /soc/pinctrl@f100000/qup0_se0_l1          !  /soc/pinctrl@f100000/qup0_se0_l2          !  /soc/pinctrl@f100000/qup0_se0_l3          !  +/soc/pinctrl@f100000/qup0_se1_l0          !  7/soc/pinctrl@f100000/qup0_se1_l1          !  C/soc/pinctrl@f100000/qup0_se1_l2          !  O/soc/pinctrl@f100000/qup0_se1_l3          !  [/soc/pinctrl@f100000/qup0_se2_l0          !  g/soc/pinctrl@f100000/qup0_se2_l1          !  s/soc/pinctrl@f100000/qup0_se2_l2          !  /soc/pinctrl@f100000/qup0_se2_l3          !  /soc/pinctrl@f100000/qup0_se2_l4          !  /soc/pinctrl@f100000/qup0_se2_l5          !  /soc/pinctrl@f100000/qup0_se2_l6          !  /soc/pinctrl@f100000/qup0_se3_l0          !  /soc/pinctrl@f100000/qup0_se3_l1          !  /soc/pinctrl@f100000/qup0_se3_l2          !  /soc/pinctrl@f100000/qup0_se3_l3          !  /soc/pinctrl@f100000/qup0_se3_l4          !  /soc/pinctrl@f100000/qup0_se3_l5          !  /soc/pinctrl@f100000/qup0_se3_l6          !  /soc/pinctrl@f100000/qup0_se4_l0          !  /soc/pinctrl@f100000/qup0_se4_l1          !  /soc/pinctrl@f100000/qup0_se4_l2          !  '/soc/pinctrl@f100000/qup0_se4_l3          !  3/soc/pinctrl@f100000/qup0_se5_l0          !  ?/soc/pinctrl@f100000/qup0_se5_l1          !  K/soc/pinctrl@f100000/qup0_se5_l2          !  W/soc/pinctrl@f100000/qup0_se5_l3          !  c/soc/pinctrl@f100000/qup0_se6_l0          !  o/soc/pinctrl@f100000/qup0_se6_l1          !  {/soc/pinctrl@f100000/qup0_se6_l2          !  /soc/pinctrl@f100000/qup0_se6_l3          !  /soc/pinctrl@f100000/qup0_se7_l0          !  /soc/pinctrl@f100000/qup0_se7_l1          !  /soc/pinctrl@f100000/qup0_se7_l2          !  /soc/pinctrl@f100000/qup0_se7_l3          !  /soc/pinctrl@f100000/qup1_se0_l0          !  /soc/pinctrl@f100000/qup1_se0_l1          !  /soc/pinctrl@f100000/qup1_se0_l2          !  /soc/pinctrl@f100000/qup1_se0_l3          !  /soc/pinctrl@f100000/qup1_se1_l0          !  /soc/pinctrl@f100000/qup1_se1_l1          !  /soc/pinctrl@f100000/qup1_se1_l2          !  /soc/pinctrl@f100000/qup1_se1_l3          !  #/soc/pinctrl@f100000/qup1_se2_l0          !  //soc/pinctrl@f100000/qup1_se2_l1          !  ;/soc/pinctrl@f100000/qup1_se2_l2          !  G/soc/pinctrl@f100000/qup1_se2_l3          !  S/soc/pinctrl@f100000/qup1_se2_l4          !  _/soc/pinctrl@f100000/qup1_se2_l5          !  k/soc/pinctrl@f100000/qup1_se2_l6          !  w/soc/pinctrl@f100000/qup1_se3_l0          !  /soc/pinctrl@f100000/qup1_se3_l1          !  /soc/pinctrl@f100000/qup1_se3_l2          !  /soc/pinctrl@f100000/qup1_se3_l3          !  /soc/pinctrl@f100000/qup1_se3_l4          !  /soc/pinctrl@f100000/qup1_se3_l5          !  /soc/pinctrl@f100000/qup1_se3_l6          !  /soc/pinctrl@f100000/qup1_se4_l0          !  /soc/pinctrl@f100000/qup1_se4_l1          !  /soc/pinctrl@f100000/qup1_se4_l2          !  /soc/pinctrl@f100000/qup1_se4_l3          !  /soc/pinctrl@f100000/qup1_se5_l0          !  /soc/pinctrl@f100000/qup1_se5_l1          !  /soc/pinctrl@f100000/qup1_se5_l2          !  /soc/pinctrl@f100000/qup1_se5_l3          !  +/soc/pinctrl@f100000/qup1_se6_l0          !  7/soc/pinctrl@f100000/qup1_se6_l1          !  C/soc/pinctrl@f100000/qup1_se6_l2          !  O/soc/pinctrl@f100000/qup1_se6_l3          !  [/soc/pinctrl@f100000/qup1_se7_l0          !  g/soc/pinctrl@f100000/qup1_se7_l1          !  s/soc/pinctrl@f100000/qup1_se7_l2          !  /soc/pinctrl@f100000/qup1_se7_l3          !  /soc/pinctrl@f100000/qup2_se0_l0          !  /soc/pinctrl@f100000/qup2_se0_l1          !  /soc/pinctrl@f100000/qup2_se0_l2          !  /soc/pinctrl@f100000/qup2_se0_l3          !  /soc/pinctrl@f100000/qup2_se1_l0          !  /soc/pinctrl@f100000/qup2_se1_l1          !  /soc/pinctrl@f100000/qup2_se1_l2          !  /soc/pinctrl@f100000/qup2_se1_l3          !  /soc/pinctrl@f100000/qup2_se2_l0          !  /soc/pinctrl@f100000/qup2_se2_l1          !  /soc/pinctrl@f100000/qup2_se2_l2          !  /soc/pinctrl@f100000/qup2_se2_l3          !  /soc/pinctrl@f100000/qup2_se2_l4          !  '/soc/pinctrl@f100000/qup2_se2_l5          !  3/soc/pinctrl@f100000/qup2_se2_l6          !  ?/soc/pinctrl@f100000/qup2_se3_l0          !  K/soc/pinctrl@f100000/qup2_se3_l1          !  W/soc/pinctrl@f100000/qup2_se3_l2          !  c/soc/pinctrl@f100000/qup2_se3_l3          !  o/soc/pinctrl@f100000/qup2_se3_l4          !  {/soc/pinctrl@f100000/qup2_se3_l5          !  /soc/pinctrl@f100000/qup2_se3_l6          !  /soc/pinctrl@f100000/qup2_se4_l0          !  /soc/pinctrl@f100000/qup2_se4_l1          !  /soc/pinctrl@f100000/qup2_se4_l2          !  /soc/pinctrl@f100000/qup2_se4_l3          !  /soc/pinctrl@f100000/qup2_se5_l0          !  /soc/pinctrl@f100000/qup2_se5_l1          !  /soc/pinctrl@f100000/qup2_se5_l2          !  /soc/pinctrl@f100000/qup2_se5_l3          !  /soc/pinctrl@f100000/qup2_se6_l0          !  /soc/pinctrl@f100000/qup2_se6_l1          !   /soc/pinctrl@f100000/qup2_se6_l2          !   /soc/pinctrl@f100000/qup2_se6_l3          !   #/soc/pinctrl@f100000/qup2_se7_l0          !   //soc/pinctrl@f100000/qup2_se7_l1          !   ;/soc/pinctrl@f100000/qup2_se7_l2          !   G/soc/pinctrl@f100000/qup2_se7_l3          !   S/soc/pinctrl@f100000/qup3_se0_l0          !   _/soc/pinctrl@f100000/qup3_se0_l1          !   k/soc/pinctrl@f100000/qup3_se0_l2          !   w/soc/pinctrl@f100000/qup3_se0_l3          !   /soc/pinctrl@f100000/qup3_se0_l4          !   /soc/pinctrl@f100000/qup3_se0_l5          !   /soc/pinctrl@f100000/qup3_se0_l6          !   /soc/pinctrl@f100000/qup3_se0_l7          !   /soc/pinctrl@f100000/qup3_se1_l0          !   /soc/pinctrl@f100000/qup3_se1_l1          !   /soc/pinctrl@f100000/qup3_se1_l2          !   /soc/pinctrl@f100000/qup3_se1_l3          !   /soc/pinctrl@f100000/qup3_se1_l4          !   /soc/pinctrl@f100000/qup3_se1_l5          !   /soc/pinctrl@f100000/qup3_se1_l6          !  !/soc/pinctrl@f100000/qup3_se1_l7            !/soc/pinctrl@7760000          !  !/soc/pinctrl@7760000/slimbus_clk          "  !(/soc/pinctrl@7760000/slimbus_data         .  !5/soc/pinctrl@7760000/slimbus_default_gpio_cfg           !N/soc/pinctrl@75C0000          %  !W/soc/pinctrl@75C0000/ssc_gpio_10_clk          %  !g/soc/pinctrl@75C0000/ssc_gpio_11_clk          %  !w/soc/pinctrl@75C0000/ssc_gpio_12_clk          %  !/soc/pinctrl@75C0000/ssc_gpio_13_clk          %  !/soc/pinctrl@75C0000/ssc_gpio_18_clk          %  !/soc/pinctrl@75C0000/ssc_gpio_19_clk          %  !/soc/pinctrl@75C0000/ssc_gpio_24_clk          %  !/soc/pinctrl@75C0000/ssc_gpio_25_clk          .  !/soc/pinctrl@75C0000/ssc_gpio_26_clk_reserved         .  !/soc/pinctrl@75C0000/ssc_gpio_27_clk_reserved         .  "	/soc/pinctrl@75C0000/ssc_gpio_28_clk_reserved         .  ""/soc/pinctrl@75C0000/ssc_gpio_29_clk_reserved         .  ";/soc/pinctrl@75C0000/ssc_gpio_30_clk_reserved         .  "T/soc/pinctrl@75C0000/ssc_gpio_31_clk_reserved         .  "m/soc/pinctrl@75C0000/ssc_gpio_34_clk_reserved         .  "/soc/pinctrl@75C0000/ssc_gpio_35_clk_reserved         $  "/soc/pinctrl@75C0000/ssc_gpio_6_clk       $  "/soc/pinctrl@75C0000/ssc_gpio_7_clk       %  "/soc/pinctrl@75C0000/ssc_qupv3_se0_0          %  "/soc/pinctrl@75C0000/ssc_qupv3_se0_1          &  "/soc/pinctrl@75C0000/ssc_qupv3_se10_0         &  "/soc/pinctrl@75C0000/ssc_qupv3_se10_1         &  "/soc/pinctrl@75C0000/ssc_qupv3_se10_2         &  #/soc/pinctrl@75C0000/ssc_qupv3_se10_3         /  #!/soc/pinctrl@75C0000/ssc_qupv3_se11_0_reserved        /  #;/soc/pinctrl@75C0000/ssc_qupv3_se11_1_reserved        /  #U/soc/pinctrl@75C0000/ssc_qupv3_se11_2_reserved        /  #o/soc/pinctrl@75C0000/ssc_qupv3_se11_3_reserved        /  #/soc/pinctrl@75C0000/ssc_qupv3_se12_0_reserved        /  #/soc/pinctrl@75C0000/ssc_qupv3_se12_1_reserved        /  #/soc/pinctrl@75C0000/ssc_qupv3_se13_0_reserved        /  #/soc/pinctrl@75C0000/ssc_qupv3_se13_1_reserved        /  #/soc/pinctrl@75C0000/ssc_qupv3_se13_2_reserved        /  $/soc/pinctrl@75C0000/ssc_qupv3_se13_3_reserved        /  $%/soc/pinctrl@75C0000/ssc_qupv3_se14_0_reserved        /  $?/soc/pinctrl@75C0000/ssc_qupv3_se14_1_reserved        %  $Y/soc/pinctrl@75C0000/ssc_qupv3_se1_0          %  $i/soc/pinctrl@75C0000/ssc_qupv3_se1_1          .  $y/soc/pinctrl@75C0000/ssc_qupv3_se1_2_reserved         .  $/soc/pinctrl@75C0000/ssc_qupv3_se1_3_reserved         %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_0          %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_1          %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_2          %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_3          %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_4          %  $/soc/pinctrl@75C0000/ssc_qupv3_se2_5          %  %/soc/pinctrl@75C0000/ssc_qupv3_se3_0          %  %/soc/pinctrl@75C0000/ssc_qupv3_se3_1          %  %+/soc/pinctrl@75C0000/ssc_qupv3_se4_0          %  %;/soc/pinctrl@75C0000/ssc_qupv3_se4_1          %  %K/soc/pinctrl@75C0000/ssc_qupv3_se4_2          %  %[/soc/pinctrl@75C0000/ssc_qupv3_se4_3          %  %k/soc/pinctrl@75C0000/ssc_qupv3_se4_4          %  %{/soc/pinctrl@75C0000/ssc_qupv3_se4_5          %  %/soc/pinctrl@75C0000/ssc_qupv3_se5_0          %  %/soc/pinctrl@75C0000/ssc_qupv3_se5_1          %  %/soc/pinctrl@75C0000/ssc_qupv3_se5_2          %  %/soc/pinctrl@75C0000/ssc_qupv3_se5_3          %  %/soc/pinctrl@75C0000/ssc_qupv3_se6_0          %  %/soc/pinctrl@75C0000/ssc_qupv3_se6_1          %  %/soc/pinctrl@75C0000/ssc_qupv3_se6_2          %  %/soc/pinctrl@75C0000/ssc_qupv3_se6_3          %  &/soc/pinctrl@75C0000/ssc_qupv3_se7_0          %  &/soc/pinctrl@75C0000/ssc_qupv3_se7_1          %  &+/soc/pinctrl@75C0000/ssc_qupv3_se7_2          %  &;/soc/pinctrl@75C0000/ssc_qupv3_se7_3          %  &K/soc/pinctrl@75C0000/ssc_qupv3_se8_0          %  &[/soc/pinctrl@75C0000/ssc_qupv3_se8_1          .  &k/soc/pinctrl@75C0000/ssc_qupv3_se9_0_reserved         .  &/soc/pinctrl@75C0000/ssc_qupv3_se9_1_reserved         -  &/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_active          ,  &/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_sleep       -  &/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_active          ,  &/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_sleep       1  &/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_active          0  '/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_sleep       -  '2/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_active          ,  'J/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_sleep       -  'a/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_active          ,  'y/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_sleep       1  '/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_active          0  '/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_sleep       -  '/soc/pinctrl@75C0000/qup_ssc0_se2_i2c_active          ,  '/soc/pinctrl@75C0000/qup_ssc0_se2_i2c_sleep       -  '/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_active          ,  (/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_sleep       1  (%/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_active          0  (A/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_sleep       -  (\/soc/pinctrl@75C0000/qup_ssc0_se2_spi_active          ,  (t/soc/pinctrl@75C0000/qup_ssc0_se2_spi_sleep       .  (/soc/pinctrl@75C0000/qup_ssc0_se2_uart_active         -  (/soc/pinctrl@75C0000/qup_ssc0_se2_uart_sleep          -  (/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_active          ,  (/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_sleep       -  (/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_sleep       1  )/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_active          0  )6/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_sleep       -  )Q/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_active          ,  )i/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_sleep       -  )/soc/pinctrl@75C0000/qup_ssc0_se4_spi_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se4_spi_sleep       .  )/soc/pinctrl@75C0000/qup_ssc0_se4_uart_active         -  )/soc/pinctrl@75C0000/qup_ssc0_se4_uart_sleep          -  )/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_active          ,  )/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_sleep       -  */soc/pinctrl@75C0000/qup_ssc0_se5_i3c_active          ,  *'/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_sleep       1  *>/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_active          0  *Z/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_sleep       -  *u/soc/pinctrl@75C0000/qup_ssc0_se5_spi_active          ,  */soc/pinctrl@75C0000/qup_ssc0_se5_spi_sleep       .  */soc/pinctrl@75C0000/qup_ssc0_se5_uart_active         -  */soc/pinctrl@75C0000/qup_ssc0_se5_uart_sleep          -  */soc/pinctrl@75C0000/qup_ssc0_se6_i2c_active          ,  */soc/pinctrl@75C0000/qup_ssc0_se6_i2c_sleep       -  +/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_active          ,  +/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_sleep       1  +3/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_active          0  +O/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_sleep       -  +j/soc/pinctrl@75C0000/qup_ssc0_se6_spi_active          ,  +/soc/pinctrl@75C0000/qup_ssc0_se6_spi_sleep       .  +/soc/pinctrl@75C0000/qup_ssc0_se6_uart_active         -  +/soc/pinctrl@75C0000/qup_ssc0_se6_uart_sleep          -  +/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_active          ,  +/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_sleep       -  +/soc/pinctrl@75C0000/qup_ssc0_se7_spi_active          ,  ,/soc/pinctrl@75C0000/qup_ssc0_se7_spi_sleep       .  ,(/soc/pinctrl@75C0000/qup_ssc0_se7_uart_active         -  ,A/soc/pinctrl@75C0000/qup_ssc0_se7_uart_sleep          -  ,Y/soc/pinctrl@75C0000/qup_ssc0_se8_i2c_active          ,  ,q/soc/pinctrl@75C0000/qup_ssc0_se8_i2c_sleep       -  ,/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_active          ,  ,/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_sleep       1  ,/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_active          0  ,/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_sleep       .  ,/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_active         -  -/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_sleep          .  -/soc/pinctrl@75C0000/qup_ssc0_se10_spi_active         -  -8/soc/pinctrl@75C0000/qup_ssc0_se10_spi_sleep          /  -P/soc/pinctrl@75C0000/qup_ssc0_se10_uart_active        .  -j/soc/pinctrl@75C0000/qup_ssc0_se10_uart_sleep           -/soc/vdd_mxa            -/soc/vdd_mxc            -/soc/vdd_cx         -/soc/vdd_lpi_mx         -/soc/vdd_lpi_cx         -/soc/clock-controller@100000            -/soc/clock-controller@1f40000           -/soc/clock-controller@7700000           -/soc/clock-controller@6bc0000           -/soc/clock-controller@7b00000           -/soc/clock-controller@6e40000           -/soc/clock-controller@7a00000           ./soc/cesta@7213000        "  ./soc/qdss/tpath_lpass_lpi_dl_tpda         &  .%/soc/qdss/tpath_lpass_lpi_crm_dl_tpda         +  .A/soc/qdss/tpath_lpass_lpi_audio_hm_dl_tpda          .b/soc/qdss/tpath_lpi_stm         .p/soc/qdss/tpath_lpi_etm         .~/soc/qdss/tpath_sdc_etm         ./soc/qdss/tpath_stm         ./soc/qdss/tpath_sdc_itm         ./soc/qdss/tpath_lpass_lpi_noc           ./soc/qdss/tpath_lpi_aon_noc         ./soc/qdss/tpath_aoc         ./soc/qdss/tpath_enpu0_noc           ./soc/qdss/tpath_enpu1_noc           ./soc/funnel@10041000            //soc/funnel@11c44000            /0/soc/funnel@11c50000            /P/soc/funnel@11c04000            F/soc/tnoc@11c31000          /^/soc/tnoc@11c39000          ./soc/tpda@11c47000          .+/soc/tpda@11c53000          .G/soc/tpda@11c55000          //soc/systemcache@20400000           //soc/spmi-bus@c400000           //soc/spmi-bus@c400000/pmic@0          6  //soc/spmi-bus@c400000/pmic@0/spmi-vadc@92/therm_table           //soc/spmi-bus@c436000           //soc/spmi-bus@c447000           //soc/ibi_ssc_0_cfg@7500000          //soc/ibi_ssc_1_cfg@7510000          //soc/ibi_ssc_2_cfg@7520000          //soc/ibi_ssc_3_cfg@7530000          //soc/ibi_ssc_4_cfg@7540000          0/soc/ibi_ssc_5_cfg@7550000          0/soc/ibi_ssc_6_cfg@7560000        9  0$/soc/kernel_test_devices@0/interrupt-controller@10140000            0)/sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg client protocol-name protocol-idx interrupt-parent interrupts #signals client-mapping offset out-mask timer-name timer-freq timer-num timer-interrupt ngpios width id qcom,strongpull egpio gpio-controller #gpio-cells interrupt-types interrupt-names summary-targetproc global-ctxt-name mux qcom,slewrate qcom,sleep-config regulator-name regulator-min-microvolt regulator-max-microvolt regulator-init-microvolt qcom,resource-name qcom,all-pd-regulator qcom,lpr-enable qcom,drv-id reg-names #clock-cells supported-hosts host remote-host fifo-size mtu-size irq-out qos-max-rate channel-name mailbox-area-size-bytes master-mailbox-size-bytes max-tx-pending-items is-master mailbox-desc-start host-name transport remote-ss ch-name options priority stack-size intents host-id fflags max-entries dest irq core-top-csr-str tcsr-base mutex-offsets-data wonce-offsets base_port num_ports atid sync_period tpdm_name tpda tpda_port dataset cmb_size cti_channels cti_triggers dbg_regs pwrdbg_ctrl_reg lpi_funnel lpi_funnel_port port_ddrss_lpi_slice0ddrss_lpi_trace_noc tpath cti_name tnoc_id tnoc_funnel_name tstype tpda_name port_occupied_mask num-channels llcc-common-reg llcc-lcp-reg channel-mode-check lpi-base scid value use-interrupt sid mid pmic bid therm-tbl label hw-ch hw-settle avg-sp dec-ratio cal-method scaling scale-fcn pull-up asid arr_id table hw-common-params adctm-hw-params trip-range num_ssc_qup ibi_base protocol se_island_config tre_list_size ibi_se_index se_mode load_fw dfs_mode ibi_id gpii gpii_irq mgr_irq status clock-names clocks qup_id qup_common_offset se_wrapper_base_offset core_frequency qup_flags num_se sdc_gpii_list core_offset ibi_instance se_flags FIFO_MODE protocol_supported interface_supported num_gpiis ring_size_multiplier core_irq pdc_irq parent_wakeup_gpio shared_se od_frequency i2c_hs_i3c_src_freq is_pipeline_enable pinctrl-names pinctrl-0 pinctrl-1 pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 num_top_qups irq_num qup0_cfg qup1_cfg qup2_cfg qup3_cfg gsi_pa tcsr_addr tcsr_gpii_offset tcsr_irq gpii_interrupts num_gpii active uStructVer pszInstName uaMasterEA pszHwioBase uHwioBaseOffset uHwioBase hBamDev uIntId uBamIntId uMyEE smbus_clk smbus_data uGpioIntNum uaNumEndPoints uaVoltageVote bIsLpiTlmm LA uaEA uDataLineMask num_device_props tlmm_name_str svs_npa_str is_master default_clock_gear prog_bam_trust island_vote subsystem_sleep_vote tlmm_clk_offset tlmm_data_offset tlmm_clk_val tlmm_data_val svs_npa use_gpio_int log_level no_retention num_local_ports local_port_base local_channel_base shared_channel_base num_local_counters is_lpm_used_for_mgr_bam_trans lpm_mgr_sb_region_base lpm_mgr_sb_region_size is_lpm_sat_sb_region_dump_enable lpm_sat_sb_region_base lpm_sat_sb_region_size ee_assign rev MmpmCoreIdType MmpmCoreInstanceIdType pClientName pwrCtrlFlag callBackFlag MMPM_Callback cbFcnStackSize interrupt-controller #interrupt-cells message service_id instance_id qdss_service_id image_idx eic_crash_enable eic_crash_type eic_crash_delay pd_timeout_exit_msec threshold_timeout_sec num_pdrs_log pd_binary_local_path pd_binary_remote_path pd_name pd_mon_install_attr pd_mon_image_sw_id subdomain_name pd_mon_restart_enable pd_mon_dump_disable rcinit_term_err_fatal_enable rcinit_term_timeout rcinit_term_timeout_group_0 rcinit_term_timeout_group_1 rcinit_term_timeout_group_2 rcinit_term_timeout_group_3 rcinit_term_timeout_group_4 rcinit_term_timeout_group_5 rcinit_term_timeout_group_6 rcinit_term_timeout_group_7 rcinit_term_latency_enable image_id pram_name pt_name wdog_irq_num err_irq_num code_ram_addr data_ram_addr code_ram_size data_ram_size pram_addr ssc_sdc_physpool_addr ssc_sdc_physpool_size ipcmem_physpool_addr ipcmem_physpool_size llccs scid-mapping-reg usecase-id dump-pools diag_cmd_request_f diag_start_stress_test_f diag_stress_test_loopback diag_legacy_health_count_base diag_get_max_req_pkt_len diag_delay_health_count_base diag_dcm_cmd_reg_test_base diag_ulogdiag_processor_id diag_subsys_id_base diag_flow_control_count_base diag_dsm_chained_count_base diag_get_cmd_reg_tbl diag_subsys_mask_retrieval_base diag_f3_trace_set_config diag_tx_mode_config diag_stress_test_delayed_rsp diag_drop_threshold_config diag_query_enable diag_get_time_api diag_get_drop_per diag_uimage_health_stats diag_start_stress_test_adv_f diag_health_stats_base diag_get_set_drain_param diag_set_drain_prop diag_health_report_config diag_get_set_client_settings diag_lock_buffer_api diag_instance_id_base diag_err_ulog_size diag_debug_ulog_size diag_cmd_ulog_size diag_data_ulog_size diag_qdss_ulog_size diag_ctrl_ulog_size diag_listener_ulog_size diag_sendbuf_dbg_ulog_size diag_dsqb_ulog_size diag_mpd_drain_timer_len diag_mpd_buf_commit_thresh_per diag_mpd_buf_drain_thresh_per diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_drain_timer_len diag_event_send_max diag_event_heap_size diag_ctrl_send_buf_size diag_ctrl_read_buf_size diag_cmd_read_buf_size diag_event_sec_heap_size diag_dci_read_buf_size diag_rsp_heap_size diag_heap_size diag_f3_trace_buf_size diag_buf_size diag_rsp_alloc_retry_timer_len diag_mask_notify_timer_len diag_tx_sleep_threshold_default diag_tx_sleep_time_default diag_core_pd_drain_threshold diag_sio_timeout_timer_len diag_cmd_read_tout_timer_len diag_max_active_listeners diag_many_drain_per_mark diag_few_drain_per_mark diag_hdlc_pad_len diag_stress_task_sleep_complete diag_buf_commit_threshold diag_buffer_default_lock_state diag_drop_flow_cnt_incr diag_drop_per_step_max diag_drop_per_threshold_max diag_deferrable_timer diag_deferrable_timer_ex diag_send_data_buf_size_max diag_min_send_data_size diag_msg_fmt_str_arg_size diag_event_rpt_pkt_len_size_nrt diag_event_rpt_pkt_size_nrt diag_event_send_max_nrt diag_event_timer_len_nrt diag_tx_sleep_threshold_nrt diag_tx_sleep_time_nrt diag_drain_timer_len_nrt diagbuf_commit_threshold_nrt diag_mpd_commit_thresh_nrt_per diag_uimage_drain_timer_len diag_uimage_buf_high_per_wm diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool diag_early_log_control diag_early_log_mask diag_early_event_mask diag_early_message_mask diag_f3_trace_control diag_f3_trace_detail_mask diag_f3_trace_version THREAD_NUMBER OVERHANG_VOTE_TIMEOUT_MS DEBUG_LEVEL baseAddr physAddr coreId pwrDomain coreClockInstances masterBusPortInstances slaveBusPortInstances numInstances memId clkId clkType clkCntlType clkName clkSrcId memoryId portConnection busClk regProgClocks icbarbMaster accessPort icbarbSlave masterPort slavePort pwrDomainName pwrDomainType intrReinitTrigger intrReinitDone securityClocks clientNum routes hw_instance masterIcbPort slaveIcbPort min index0 index1 index2 index3 index4 index5 index6 index7 index8 index9 index10 soc ipcc_mproc ipcc_compute_l0 ipcc_compute_l1 ipcc_periph ipcc_legacy SystemTimer WakeUpTimer tlmm qup0_se0_l0 qup0_se0_l1 qup0_se0_l2 qup0_se0_l3 qup0_se1_l0 qup0_se1_l1 qup0_se1_l2 qup0_se1_l3 qup0_se2_l0 qup0_se2_l1 qup0_se2_l2 qup0_se2_l3 qup0_se2_l4 qup0_se2_l5 qup0_se2_l6 qup0_se3_l0 qup0_se3_l1 qup0_se3_l2 qup0_se3_l3 qup0_se3_l4 qup0_se3_l5 qup0_se3_l6 qup0_se4_l0 qup0_se4_l1 qup0_se4_l2 qup0_se4_l3 qup0_se5_l0 qup0_se5_l1 qup0_se5_l2 qup0_se5_l3 qup0_se6_l0 qup0_se6_l1 qup0_se6_l2 qup0_se6_l3 qup0_se7_l0 qup0_se7_l1 qup0_se7_l2 qup0_se7_l3 qup1_se0_l0 qup1_se0_l1 qup1_se0_l2 qup1_se0_l3 qup1_se1_l0 qup1_se1_l1 qup1_se1_l2 qup1_se1_l3 qup1_se2_l0 qup1_se2_l1 qup1_se2_l2 qup1_se2_l3 qup1_se2_l4 qup1_se2_l5 qup1_se2_l6 qup1_se3_l0 qup1_se3_l1 qup1_se3_l2 qup1_se3_l3 qup1_se3_l4 qup1_se3_l5 qup1_se3_l6 qup1_se4_l0 qup1_se4_l1 qup1_se4_l2 qup1_se4_l3 qup1_se5_l0 qup1_se5_l1 qup1_se5_l2 qup1_se5_l3 qup1_se6_l0 qup1_se6_l1 qup1_se6_l2 qup1_se6_l3 qup1_se7_l0 qup1_se7_l1 qup1_se7_l2 qup1_se7_l3 qup2_se0_l0 qup2_se0_l1 qup2_se0_l2 qup2_se0_l3 qup2_se1_l0 qup2_se1_l1 qup2_se1_l2 qup2_se1_l3 qup2_se2_l0 qup2_se2_l1 qup2_se2_l2 qup2_se2_l3 qup2_se2_l4 qup2_se2_l5 qup2_se2_l6 qup2_se3_l0 qup2_se3_l1 qup2_se3_l2 qup2_se3_l3 qup2_se3_l4 qup2_se3_l5 qup2_se3_l6 qup2_se4_l0 qup2_se4_l1 qup2_se4_l2 qup2_se4_l3 qup2_se5_l0 qup2_se5_l1 qup2_se5_l2 qup2_se5_l3 qup2_se6_l0 qup2_se6_l1 qup2_se6_l2 qup2_se6_l3 qup2_se7_l0 qup2_se7_l1 qup2_se7_l2 qup2_se7_l3 qup3_se0_l0 qup3_se0_l1 qup3_se0_l2 qup3_se0_l3 qup3_se0_l4 qup3_se0_l5 qup3_se0_l6 qup3_se0_l7 qup3_se1_l0 qup3_se1_l1 qup3_se1_l2 qup3_se1_l3 qup3_se1_l4 qup3_se1_l5 qup3_se1_l6 qup3_se1_l7 lpi_tlmm slimbus_clk slimbus_data slimbus_default_gpio_cfg ssc_tlmm ssc_gpio_10_clk ssc_gpio_11_clk ssc_gpio_12_clk ssc_gpio_13_clk ssc_gpio_18_clk ssc_gpio_19_clk ssc_gpio_24_clk ssc_gpio_25_clk ssc_gpio_26_clk_reserved ssc_gpio_27_clk_reserved ssc_gpio_28_clk_reserved ssc_gpio_29_clk_reserved ssc_gpio_30_clk_reserved ssc_gpio_31_clk_reserved ssc_gpio_34_clk_reserved ssc_gpio_35_clk_reserved ssc_gpio_6_clk ssc_gpio_7_clk ssc_qupv3_se0_0 ssc_qupv3_se0_1 ssc_qupv3_se10_0 ssc_qupv3_se10_1 ssc_qupv3_se10_2 ssc_qupv3_se10_3 ssc_qupv3_se11_0_reserved ssc_qupv3_se11_1_reserved ssc_qupv3_se11_2_reserved ssc_qupv3_se11_3_reserved ssc_qupv3_se12_0_reserved ssc_qupv3_se12_1_reserved ssc_qupv3_se13_0_reserved ssc_qupv3_se13_1_reserved ssc_qupv3_se13_2_reserved ssc_qupv3_se13_3_reserved ssc_qupv3_se14_0_reserved ssc_qupv3_se14_1_reserved ssc_qupv3_se1_0 ssc_qupv3_se1_1 ssc_qupv3_se1_2_reserved ssc_qupv3_se1_3_reserved ssc_qupv3_se2_0 ssc_qupv3_se2_1 ssc_qupv3_se2_2 ssc_qupv3_se2_3 ssc_qupv3_se2_4 ssc_qupv3_se2_5 ssc_qupv3_se3_0 ssc_qupv3_se3_1 ssc_qupv3_se4_0 ssc_qupv3_se4_1 ssc_qupv3_se4_2 ssc_qupv3_se4_3 ssc_qupv3_se4_4 ssc_qupv3_se4_5 ssc_qupv3_se5_0 ssc_qupv3_se5_1 ssc_qupv3_se5_2 ssc_qupv3_se5_3 ssc_qupv3_se6_0 ssc_qupv3_se6_1 ssc_qupv3_se6_2 ssc_qupv3_se6_3 ssc_qupv3_se7_0 ssc_qupv3_se7_1 ssc_qupv3_se7_2 ssc_qupv3_se7_3 ssc_qupv3_se8_0 ssc_qupv3_se8_1 ssc_qupv3_se9_0_reserved ssc_qupv3_se9_1_reserved qup_ssc0_se0_i2c_active qup_ssc0_se0_i2c_sleep qup_ssc0_se0_i3c_active qup_ssc0_se0_i3c_sleep qup_ssc0_se0_i3c_ibi_active qup_ssc0_se0_i3c_ibi_sleep qup_ssc0_se1_i2c_active qup_ssc0_se1_i2c_sleep qup_ssc0_se1_i3c_active qup_ssc0_se1_i3c_sleep qup_ssc0_se1_i3c_ibi_active qup_ssc0_se1_i3c_ibi_sleep qup_ssc0_se2_i2c_active qup_ssc0_se2_i2c_sleep qup_ssc0_se2_i3c_active qup_ssc0_se2_i3c_sleep qup_ssc0_se2_i3c_ibi_active qup_ssc0_se2_i3c_ibi_sleep qup_ssc0_se2_spi_active qup_ssc0_se2_spi_sleep qup_ssc0_se2_uart_active qup_ssc0_se2_uart_sleep qup_ssc0_se3_i2c_active qup_ssc0_se3_i2c_sleep qup_ssc0_se3_i3c_active qup_ssc0_se3_i3c_sleep qup_ssc0_se3_i3c_ibi_active qup_ssc0_se3_i3c_ibi_sleep qup_ssc0_se4_i2c_active qup_ssc0_se4_i2c_sleep qup_ssc0_se4_spi_active qup_ssc0_se4_spi_sleep qup_ssc0_se4_uart_active qup_ssc0_se4_uart_sleep qup_ssc0_se5_i2c_active qup_ssc0_se5_i2c_sleep qup_ssc0_se5_i3c_active qup_ssc0_se5_i3c_sleep qup_ssc0_se5_i3c_ibi_active qup_ssc0_se5_i3c_ibi_sleep qup_ssc0_se5_spi_active qup_ssc0_se5_spi_sleep qup_ssc0_se5_uart_active qup_ssc0_se5_uart_sleep qup_ssc0_se6_i2c_active qup_ssc0_se6_i2c_sleep qup_ssc0_se6_i3c_active qup_ssc0_se6_i3c_sleep qup_ssc0_se6_i3c_ibi_active qup_ssc0_se6_i3c_ibi_sleep qup_ssc0_se6_spi_active qup_ssc0_se6_spi_sleep qup_ssc0_se6_uart_active qup_ssc0_se6_uart_sleep qup_ssc0_se7_i2c_active qup_ssc0_se7_i2c_sleep qup_ssc0_se7_spi_active qup_ssc0_se7_spi_sleep qup_ssc0_se7_uart_active qup_ssc0_se7_uart_sleep qup_ssc0_se8_i2c_active qup_ssc0_se8_i2c_sleep qup_ssc0_se8_i3c_active qup_ssc0_se8_i3c_sleep qup_ssc0_se8_i3c_ibi_active qup_ssc0_se8_i3c_ibi_sleep qup_ssc0_se10_i2c_active qup_ssc0_se10_i2c_sleep qup_ssc0_se10_spi_active qup_ssc0_se10_spi_sleep qup_ssc0_se10_uart_active qup_ssc0_se10_uart_sleep vdd_mxa vdd_mxc vdd_cx vdd_lpi_mx vdd_lpi_cx gcc lpass_aon_cc lpass_aon_mx_cc lpass_audio_cc lpass_core_cc lpass_lpmla_cc scc lpass_cesta tpath_lpass_lpi_dl_tpda tpath_lpass_lpi_crm_dl_tpda tpath_lpass_lpi_audio_hm_dl_tpda tpath_lpi_stm tpath_lpi_etm tpath_sdc_etm tpath_stm tpath_sdc_itm tpath_lpass_lpi_noc tpath_lpi_aon_noc tpath_aoc tpath_enpu0_noc tpath_enpu1_noc in_fun0_in_fun0_cxatbfunnel lpass_lpi_fun0_fun0_cxatbfunnel lpass_lpi_fun1_fun1_cxatbfunnel aoss_apb_fun0 ddrss_lpi_slice1ddrss_lpi_trace_noc systemcache0 spmi_bus pmk8850_0 therm_table spmi_bus1 spmi_bus2 ibi_ssc_0_cfg ibi_ssc_1_cfg ibi_ssc_2_cfg ibi_ssc_3_cfg ibi_ssc_4_cfg ibi_ssc_5_cfg ibi_ssc_6_cfg intc sw       X   8  
x   (              
@                                 qcom,mahua           qcom,mahua                              board-id             ,audio_process-mahua-1.0-adsp             6            soc                                   @      cxstmtrace@16000000          qcom,stmtrace            H               L           V   @      lpistmtrace@7100000          qcom,stmtrace            H              L           V   @         sw           @      core       cpt_boot_test            `      `            l             w      test1                                                                                    l             w         *   My Secret Message, Please keep it secret!         test2         test_types                       U                              
   󵳥U#4                             4VxeC!         %               (  <穣4VxܺvT2         M      test_pic_3        	   qcom,pic            d             test_uart1        
   qcom,uart           d                          lbase rx tx        test_uart2        
   qcom,uart           d              PD_Access_control           v  U      OEM_Flavor_Validation                       mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config                       !               debugtrace           qcom,debugtrace            	      debugtools     tms_diag             qcom,tms_diag                    eic       	   qcom,eic                                       Z      version_tbl          qcom,image_version_tbl_idx                      power      qdsp_pm    pd           qcom,pd-audio-process                             diag             qcom,audio_user_diagcfg    diagcfg_cmd          g            i          3 =          Q           l                                                   diagcfg_param                                                         :           N          c                         2                                                              1            G            `          z                       AUDIO_ISLAND_TCM_PHYSPOOL           QSH_ISLAND_POOL             __symbols__         /soc            /sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg base_port num_ports test_config test_bool1 test_bool2 test_ver test_uint8_list test_uint16 test_uint32 test_uint32_list test_uint64 test_string test_uint8 test_uint8_list_empty test_uint16_list test_uint16_list_empty test_uint32_list_empty test_uint64_list test_uint64_list_empty reg_alt reg-names PD_indicator test_oem_entry service_id instance_id qdss_service_id image_id eic_crash_enable eic_crash_type eic_crash_delay image_idx QDI_QDSP_PM_USER_ID diag_test_cmd_f diag_v2_test_cmd_f diag_legacy_health_count_base diag_ulogdiag_processor_id diag_subsys_id_base diag_lsm_cmd_reg_test_base diag_get_set_drain_param diag_f3_trace_set_config diag_health_stats_base diag_err_ulog_size diag_debug_ulog_size diag_qdss_ulog_size diag_logtracker_ulog_size diag_dsqb_ulog_size diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_event_send_max diag_multipd_buf_size diag_multipd_event_heap_size diag_send_buf_size_data_userpd diag_lsm_stack_size diag_stress_task_sleep_complete diag_deferrable_timer diag_deferrable_timer_ex diag_msg_fmt_str_arg_size diag_uimage_mpd_buf_size diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool soc sw    h   8     (                                               qcom,mahua           qcom,mahua                              board-id             ,qsh_process-mahua-1.0-adsp           6            soc                                   @      cxstmtrace@16000000          qcom,stmtrace            H               L  @         V   @      lpistmtrace@7100000          qcom,stmtrace            H              L  @         V   @         sw           @      core       cpt_boot_test      PD_Access_control            `  X      OEM_Flavor_Validation            m            mproc      qmi    qcsi             qcom,qmi_qcsi_user_pd_config       qmi_qcsi_ping_server_config          |               "               debugtrace           qcom,debugtrace                   debugtools     tms_diag             qcom,tms_diag                     eic       	   qcom,eic                                          Z      version_tbl          qcom,image_version_tbl_idx                       power      qdsp_pm    pd           qcom,pd-qsh-process                         products       sdcloader            qcom,sdcloader     sdc_params             <                               !           /          =           Ka        sdc_physpool            U           k           'P                           diag             qcom,sensor_user_diagcfg       diagcfg_cmd          h           j           =                                          6          O          h'        diagcfg_param                                                                                                   2   2        F           \           y                                                                             .            LQSH_ISLAND_POOL         ]QSH_ISLAND_POOL          qup_user_pd_feature          qcom,sw-qup-user-pd-controller          s            __symbols__         /soc            /sw          	model compatible #address-cells #size-cells proc-name chip-info phandle reg base_port num_ports PD_indicator test_oem_entry service_id instance_id qdss_service_id image_id eic_crash_enable eic_crash_type eic_crash_delay image_idx QDI_QDSP_PM_USER_ID wdog_irq_num err_irq_num code_ram_addr data_ram_addr code_ram_size data_ram_size pram_addr ssc_sdc_physpool_addr ssc_sdc_physpool_size ipcmem_physpool_addr ipcmem_physpool_size diag_test_cmd_f diag_v2_test_cmd_f diag_legacy_health_count_base diag_ulogdiag_processor_id diag_subsys_id_base diag_lsm_cmd_reg_test_base diag_get_set_drain_param diag_f3_trace_set_config diag_health_stats_base diag_err_ulog_size diag_debug_ulog_size diag_qdss_ulog_size diag_logtracker_ulog_size diag_dsqb_ulog_size diag_event_timer_len diag_event_rpt_pkt_len_size diag_event_rpt_pkt_size diag_event_send_max diag_multipd_buf_size diag_multipd_event_heap_size diag_send_buf_size_data_userpd diag_lsm_stack_size diag_stress_task_sleep_complete diag_deferrable_timer diag_deferrable_timer_ex diag_msg_fmt_str_arg_size diag_uimage_mpd_buf_size diag_uimage_f3_trace_buf_size diag_uimage_pool diag_uimage_test_pool user_pd_island_enabled soc sw                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        h              S                               !                                                                                                                                                                                                      VU YGeϏ>(ܭ2]% >AncȰg !|ty~Ɣ@mxz$:d܍eԵGPۂDQG͗                                                0e1 KcؽZۭH/3Ys4P({g
Z;cZ0rk9~DgRq[w)4`̝IeW4ts 00:0
*H=010	UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U	San Diego10U
QUALCOMM10UCDMA Technologies1200U)General Use Test Key 0 (for testing only)0260128094736Z460123094736Z0f10	UUS10U
California10USecTools Test User10U
SecTools10U	San Diego0v0*H=+ "b ddsN|Oz2v!v݊b{)J5IP7݅^CxMRJ
Y<EhUwl	
)o0m0U#0wDM2@tXϙL0	U0 0U0U%0
+0U68EyNUK950
*H=i 0f1 ǫԍ-E#CdȜ-V1 Ό5mF/@qRs}hb^BZyb$AX.jux00u0
*H=010	UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U	San Diego10U
QUALCOMM10UCDMA Technologies100.U'General Use Test Key (for testing only)0160321215215Z360316215215Z010	UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U	San Diego10U
QUALCOMM10UCDMA Technologies1200U)General Use Test Key 0 (for testing only)0v0*H=+ "b T}I%O[Hp] f{I/C#9g@qKx?jEyAsԜh'$,H
peypyP5`0^0U#0oq's	֟>qb0UwDM2@tXϙL0U0 0U0
*H=i 0f1 _H9<}	ͣb:v࣮^6+<[ 61 ftWzcvž$ֱ(9	@n)f>F߲400N0
*H=010	UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U	San Diego10U
QUALCOMM10UCDMA Technologies100.U'General Use Test Key (for testing only)0160321215211Z360316215211Z010	UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U	San Diego10U
QUALCOMM10UCDMA Technologies100.U'General Use Test Key (for testing only)0v0*H=+ "b 3x~ҩ/פ{Pyjh`7_줎j^K1o$lTg]ء[SQq6 /PZoT:ާ%i1>}`<0:0Uoq's	֟>qb0U00U0
*H=h 0e0u(C9uT(&\L<tBvɿxJ܀s6U1 H/h#8o&&
>GaT׍),$W