???<!-- GIF89;a -->
123123123123
.....................................................................................................................................???<!-- GIF89;a -->
123123123123
.....................................................................................................................................Þ•    µ      Ä  ñ   l      0     1  L   3  K   €  4   Ì  ½     3   ¿  u   ó  7   i  k   ¡  }        ‹  [        x  [     Ž   b  ”   ñ  (   †  (   ¯  (   Ø  1     %   3  %   Y  1     .   ±  ?   à  ?      (   `  (   ‰  2   ²  1   å  ?     (   W     €     •     ¢  /   ²  .   â               +     F     a     {  	   •  	   Ÿ     ©     Ä     ß     ò       (   $     M     c     z     š     ³     Ñ     î  *         +  
   J  %   U  )   {  %   ¥  !   Ë  !   í  $        4  :   P  9   ‹  0   Å  +   ö  *   "  .   M     |  "   –     ¹     Ì     ß     õ          !     7     O     h     †  )   ˜  %   Â  #   è  +     +   8  1   d  1   –  +   È  1   ô  1   &      X      t   #   “   "   ·   "   Ú       ý   %   !     D!  <   X!     •!     °!     È!     ã!     ü!  +   "     ="  !   W"  "   y"  +   œ"      È"      é"      
#     +#     K#  !   _#     #     ‘#     ©#     Ä#     Ú#     ú#     $     6$     T$     r$     ƒ$     š$  "   ª$     Í$     í$     
%     %%     8%  %   I%     o%     …%     %     ²%     É%     Ý%     ñ%     ý%  !   	&     +&  $   <&  %   a&     ‡&     ¦&  2   º&  2   í&  2    '     S'     j'     z'     —'     ¤'     Á'     Þ'  %   ú'      (     8(  -   X(  ;   †(  /   Â(  	   ò(     ü(     )     !)     1)     A)      Y)     z)     “)     «)  ø  Ã)     ¼+  >   ¾+  =   ý+  /   ;,  ˜   k,  5   -  z   :-  2   µ-  z   è-  T   c.  l   ¸.  D   %/  i   j/  k   Ô/  k   @0  s   ¬0  (    1  (   I1  (   r1  *   ›1  (   Æ1  (   ï1  *   2  '   C2  0   k2  0   œ2  +   Í2  +   ù2  +   %3  *   Q3  9   |3  +   ¶3     â3     ý3     
4  0   4  /   J4     z4     ‰4     ˜4     ²4     Ì4     á4     ù4     5     5     &5     <5     N5     `5  ,   {5     ¨5     À5     Ü5     ó5  *   6  *   :6     e6  "   {6     ž6     ½6     É6  "   è6     7     *7     E7     `7     ~7  E   —7  E   Ý7  6   #8  -   Z8  4   ˆ8  3   ½8     ñ8     	9     %9     79     I9     ^9     s9     ˆ9     9     ¹9  %   É9     ï9  ,    :  '   -:  '   U:  1   }:  1   ¯:  9   á:  9   ;  1   U;  9   ‡;  9   Á;     û;     <  #   .<  "   R<  "   u<     ˜<  0   µ<     æ<  9   ü<     6=     L=     g=     …=     ž=  '   ·=     ß=     ì=     ÿ=  #   >     3>     J>     a>     x>     Ž>     ž>     ½>     Ð>     ã>     ö>     ?     ?     -?     A?     U?     i?     y?  	   ‰?     “?     ¯?     ¿?     Ï?     å?     û?  $   @     3@     F@     b@     {@     ”@     ª@     À@  
   Î@  !   Ù@     û@     A  $   !A  #   FA     jA  .   |A  /   «A  .   ÛA     
B      B     -B     IB     YB     uB     ‘B     ¬B     ÌB     åB  3   C  7   8C  4   pC  	   ¥C     ¯C     ÅC     ÌC     ÛC     êC     D     D     4D     CD     ]           >   ³       ‘   	                    w                  z   m      x   ±       *   L      k       '      ¥      n   6   Q           d      .      r                  R   ^                  @   §   ™   ¡   i   s           |      h   •         t   8       5   V      v   !   …   p       K   j   3   {       C   M       P       Ÿ   :   }   %       <   9           $       B                      “       ž   A       (   f   –      ?   a   _   ’   o       ¯      N       `      y   ª      \   ‡   D   ©   ˆ   e   F   -   T   Ž       G   «   ~       ²             l   J   1   µ           H       —      Y   ,      Š   £   ®       ´   b   ¦              4       =   ¤   +      "   &   #       ¢   ¬   ˜   I       ”   W       c   [   š   ¨   S   Œ   ƒ   †   „   g          )      U   ‹   O       X             q   °           ‚       E      ;       u   7   Z   œ       ‰       
   €   ­   /      2   0           ›           
 
  For the options above, The following values are supported for "ARCH":
    
  For the options above, the following values are supported for "ABI":
    
  aliases            Do print instruction aliases.
 
  cp0-names=ARCH           Print CP0 register names according to
                           specified architecture.
                           Default: based on binary being disassembled.
 
  debug_dump         Temp switch for debug trace.
 
  fpr-names=ABI            Print FPR names according to specified ABI.
                           Default: numeric.
 
  no-aliases         Don't print instruction aliases.
 
  reg-names=ABI            Print GPR and FPR names according to
                           specified ABI.
 
  reg-names=ARCH           Print CP0 register and HWR names according to
                           specified architecture.
 
The following AARCH64 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
 
The following ARM specific disassembler options are supported for use with
the -M switch:
 
The following MIPS specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
 
The following PPC specific disassembler options are supported for use with
the -M switch:
 
The following S/390 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
 
The following i386/x86-64 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
   addr16      Assume 16bit address size
   addr32      Assume 32bit address size
   addr64      Assume 64bit address size
   att         Display instruction in AT&T syntax
   data16      Assume 16bit data size
   data32      Assume 32bit data size
   dpfp            Recognize FPX DP instructions.
   dsp             Recognize DSP instructions.
   fpud            Recognize double precision FPU instructions.
   fpus            Recognize single precision FPU instructions.
   i386        Disassemble in 32bit mode
   i8086       Disassemble in 16bit mode
   intel       Display instruction in Intel syntax
   spfp            Recognize FPX SP instructions.
   suffix      Always display instruction suffix in AT&T syntax
   x86-64      Disassemble in 64bit mode
 # <dis error: %08lx> $<undefined> %02x		*unknown* %dsp16() takes a symbolic address, not a number %dsp8() takes a symbolic address, not a number %s: Error:  %s: Warning:  'LSL' operator not allowed 'ROR' operator not allowed (DP) offset out of range. (SP) offset out of range. (unknown) *unknown* 21-bit offset out of range 64-bit address is disabled <function code %d> <illegal precision> <internal disassembler error> <internal error in opcode table: %s %s>
 <unknown register %d> ABORT: unknown operand Address 0x%s is out of bounds.
 Bad immediate expression Bad register in postincrement Bad register in preincrement Bad register name Don't know how to specify # dependency %s
 Error: read from memory failed Hmmmm 0x%x Immediate is out of range -128 to 127 Immediate is out of range -32768 to 32767 Immediate is out of range -512 to 511 Immediate is out of range -7 to 8 Immediate is out of range -8 to 7 Immediate is out of range 0 to 65535 Internal disassembler error Internal error:  bad sparc-opcode.h: "%s", %#.8lx, %#.8lx
 Internal error: bad sparc-opcode.h: "%s", %#.8lx, %#.8lx
 Invalid position, should be 0, 16, 32, 48 or 64. Invalid position, should be 0, 8, 16, or 24 Invalid position, should be 0,4, 8,...124. Invalid position, should be 16, 32, 64 or 128. Label conflicts with `Rx' Label conflicts with register name Missing '#' prefix Missing '.' prefix Missing 'pag:' prefix Missing 'pof:' prefix Missing 'seg:' prefix Missing 'sof:' prefix Operand is not a symbol SR/SelID is out of range Syntax error: No trailing ')' Unknown error %d
 Unrecognised disassembler CPU option: %s
 Unrecognised disassembler option: %s
 Unrecognised register name set: %s
 Unrecognized field %d while building insn.
 Unrecognized field %d while decoding insn.
 Unrecognized field %d while getting int operand.
 Unrecognized field %d while getting vma operand.
 Unrecognized field %d while printing insn.
 Unrecognized field %d while setting int operand.
 Unrecognized field %d while setting vma operand.
 Value is not aligned enough Value must be a multiple of 16 Value must be in the range 0 to 240 Value must be in the range 0 to 28 Value must be in the range 0 to 31 Value must be in the range 1 to  W keyword invalid in FR operand slot. W register expected Warning: disassembly unreliable - not enough bytes available address writeback expected bad instruction `%.50s' bad instruction `%.50s...' branch operand unaligned branch to odd offset branch value not in range and to odd offset branch value out of range displacement value is not aligned displacement value is out of range don't know how to specify %% dependency %s
 dsp:16 immediate is out of range dsp:20 immediate is out of range dsp:24 immediate is out of range dsp:8 immediate is out of range extraneous register floating-point immediate expected illegal bitmask illegal immediate value illegal use of parentheses imm10 is out of range imm:6 immediate is out of range immediate is out of range 0-7 immediate is out of range 1-2 immediate is out of range 1-8 immediate is out of range 2-9 immediate offset immediate out of range immediate value immediate value cannot be register immediate value is out of range immediate value out of range invalid conditional option invalid mask field invalid register invalid register for stack adjustment invalid register name invalid register offset invalid shift amount invalid shift operator jump hint unaligned junk at end of line missing `)' missing `]' missing mnemonic in syntax string missing register negative immediate value not allowed negative or unaligned offset expected offset(IP) is not a valid form operand is not zero operand out of range (%ld not between %ld and %ld) operand out of range (%ld not between %ld and %lu) operand out of range (%lu not between %lu and %lu) register element index register number register number must be even shift amount shift amount must be 0 or 12 shift amount must be 0 or 16 shift amount must be 0 or 8 shift amount must be a multiple of 16 shift operator expected stack pointer register expected syntax error (expected char `%c', found `%c') syntax error (expected char `%c', found end of instruction) unable to change directory to "%s", errno = %s
 undefined unexpected address writeback unknown unknown	0x%02lx unknown	0x%04lx unknown constraint `%c' unrecognized form of instruction unrecognized instruction vector5 is out of range vector8 is out of range Project-Id-Version: opcodes 2.28.90
Report-Msgid-Bugs-To: bug-binutils@gnu.org
POT-Creation-Date: 2017-07-03 16:55+0200
PO-Revision-Date: 2017-11-25 20:10+0800
Last-Translator: Boyuan Yang <073plan@gmail.com>
Language-Team: Chinese (simplified) <i18n-zh@googlegroups.com>
Language: zh_CN
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Plural-Forms: nplurals=1; plural=0;
X-Bugs: Report translation errors to the Language-Team address.
X-Generator: Poedit 2.0.4
 
 
  å¯¹äºŽä»¥ä¸Šçš„é€‰é¡¹ï¼Œä»¥ä¸‹å€¼å¯è¢«ç”¨äºŽ "ARCH"ï¼š
    
  å¯¹äºŽä»¥ä¸Šçš„é€‰é¡¹ï¼Œä»¥ä¸‹å€¼å¯è¢«ç”¨äºŽ "ABI"ï¼š
    
  aliases            è¦æ‰“å°æŒ‡ä»¤åˆ«åã€‚
 
  cp0-names=ARCH           æ ¹æ®æŒ‡å®šçš„æž¶æž„æ‰“å° CP0 å¯„å­˜å™¨åã€‚
                           é»˜è®¤ï¼šæ ¹æ®è¢«åæ±‡ç¼–çš„äºŒè¿›åˆ¶ä»£ç ã€‚
 
  debug_dump         è°ƒè¯•è·Ÿè¸ªçš„ä¸´æ—¶å¼€å…³ã€‚
 
  fpr-names=ABI            æ ¹æ®æŒ‡å®šçš„ ABI æ‰“å°æµ®ç‚¹å¯„å­˜å™¨åã€‚
                           é»˜è®¤ï¼šæ•°å­—ã€‚
 
  no-aliases         ä¸è¦æ‰“å°æŒ‡ä»¤åˆ«åã€‚
 
  reg-names=ABI            æ ¹æ®æŒ‡å®šçš„ ABI æ‰“å°é€šç”¨å¯„å­˜å™¨å’Œæµ®ç‚¹å¯„å­˜
                           å™¨åã€‚
 
  reg-names=ARCH           æ ¹æ®æŒ‡å®šçš„æž¶æž„æ‰“å° CP0 å’Œ HWR å¯„å­˜å™¨åã€‚
 
ä¸‹åˆ— AARCH64 ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹å¯é€šè¿‡ -M å¼€å…³å¯ç”¨ï¼ˆä½¿ç”¨é€—å·åˆ†éš”å¤šä¸ªé€‰é¡¹ï¼‰ï¼š
 
ä¸‹åˆ— ARM ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹å¯é€šè¿‡ -M å¼€å…³å¯ç”¨ï¼š
 
ä¸‹åˆ— MIPS ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹å¯é€šè¿‡ -M å¼€å…³å¯ç”¨ï¼ˆä½¿ç”¨é€—å·åˆ†éš”å¤šä¸ªé€‰é¡¹ï¼‰ï¼š
 
ä¸‹åˆ— PPC ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹åœ¨ä½¿ç”¨ -M å¼€å…³æ—¶å¯ç”¨ï¼ˆä½¿ç”¨é€—å·åˆ†éš”å¤šä¸ªé€‰é¡¹ï¼‰ï¼š
 

ä¸‹åˆ— S/390 ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹å¯é€šè¿‡ -M å¼€å…³å¯ç”¨ï¼ˆä½¿ç”¨é€—å·åˆ†éš”å¤šä¸ªé€‰é¡¹ï¼‰ï¼š
 
ä¸‹åˆ— i386/x86-64 ç‰¹å®šçš„åæ±‡ç¼–å™¨é€‰é¡¹åœ¨ä½¿ç”¨ -M å¼€å…³æ—¶å¯ç”¨ï¼ˆä½¿ç”¨é€—å·åˆ†éš”å¤šä¸ªé€‰é¡¹ï¼‰ï¼š
   addr16      å‡å®š 16 ä½åœ°å€å¤§å°
   addr32      å‡å®š 32 ä½åœ°å€å¤§å°
   addr64      å‡å®š 64 ä½åœ°å€å¤§å°
   att         ç”¨ AT&T è¯­æ³•æ˜¾ç¤ºæŒ‡ä»¤
   data16      å‡å®š 16 ä½æ•°æ®å¤§å°
   data32      å‡å®š 32 ä½æ•°æ®å¤§å°
   dpfp            è¯†åˆ« FPX DP æŒ‡ä»¤ã€‚
   dsp             è¯†åˆ« DSP æŒ‡ä»¤ã€‚
   fpud            è¯†åˆ«åŒç²¾åº¦ FPU æŒ‡ä»¤ã€‚
   fpus            è¯†åˆ«å•ç²¾åº¦ FPU æŒ‡ä»¤ã€‚
   i386        åœ¨ 32 ä½æ¨¡å¼ä¸‹åæ±‡ç¼–
   i8086       åœ¨ 16 ä½æ¨¡å¼ä¸‹åæ±‡ç¼–
   intel       ç”¨ Intel è¯­æ³•æ˜¾ç¤ºæŒ‡ä»¤
   spfp            è¯†åˆ« FPX SP æŒ‡ä»¤ã€‚
   suffix      åœ¨ AT&T è¯­æ³•ä¸­å§‹ç»ˆæ˜¾ç¤ºæŒ‡ä»¤åŽç¼€
   x86-64      åœ¨ 64 ä½æ¨¡å¼ä¸‹åæ±‡ç¼–
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